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基于HICUM模型的高速锗硅异质结双极性晶体管可缩放模型研究(英文) 被引量:1
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作者 周伟坚 程知群 刘军 《电子器件》 CAS 2010年第5期561-564,共4页
针对高速锗硅异质结双极性晶体管,在基于HICUM模型的基础上,建立了HICUM可缩放模型,并且在ADS和Hspice中都得到了很好的应用。可缩放模型是基于不同的尺寸的器件而建立的,所有可缩放模型中的参数都是直接从不同尺寸器件的测量数据中取得... 针对高速锗硅异质结双极性晶体管,在基于HICUM模型的基础上,建立了HICUM可缩放模型,并且在ADS和Hspice中都得到了很好的应用。可缩放模型是基于不同的尺寸的器件而建立的,所有可缩放模型中的参数都是直接从不同尺寸器件的测量数据中取得的,并且通过比较直流、电压电容关系、截止频率和S参数的测量和仿真数据,可以看出拟合结果比较好,HICUM可缩放模型得到了很好的验证。 展开更多
关键词 可缩放模型 锗硅hbt HICUM模型
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Epitaxy of SiGe HBT Structure by High Vacuum/Rapid Thermal Processing/Chemical Vapor Deposition
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作者 贾宏勇 林惠旺 +1 位作者 陈培毅 钱佩信 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2001年第3期251-255,共5页
The strained SiGe material has been grown by using the newly developed High Vacuum/Rapid Thermal Processing/Chemical Vapor Deposition (HV/RTP/CVD) system.Device quality material is grown by handling process after car... The strained SiGe material has been grown by using the newly developed High Vacuum/Rapid Thermal Processing/Chemical Vapor Deposition (HV/RTP/CVD) system.Device quality material is grown by handling process after careful design. The Ge fraction varies up to 0 25, and the n and p type doping is well controlled,which are both adapted to the fabrication of Heterojunction Bipolar Transistors (HBT). The SiGe HBT structure, namely n Si/i p + i SiGe/n Si structure, has been investigated, with which, the HBTs are fabricated and show good performance. The new system has been proved potential and practicable. 展开更多
关键词 CVD SIGE hbt
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SiGe HBT高增益宽带低噪声放大器设计 被引量:1
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作者 李国军 徐永祥 《半导体技术》 CAS CSCD 北大核心 2013年第4期259-262,296,共5页
基于锗硅异质结双极晶体管(SiGe HBT)工艺设计了一款单片集成高增益宽带低噪声放大器(LNA)。该放大器采用复合型电阻负反馈结构,通过调整不同的反馈电阻,同时实现了良好的端口匹配、低噪声系数和高增益等特性,适合于射频或中频信号处理... 基于锗硅异质结双极晶体管(SiGe HBT)工艺设计了一款单片集成高增益宽带低噪声放大器(LNA)。该放大器采用复合型电阻负反馈结构,通过调整不同的反馈电阻,同时实现了良好的端口匹配、低噪声系数和高增益等特性,适合于射频或中频信号处理系统。芯片采用板上芯片(COB)方式测试,结果表明:在10~800 MHz工作频带内,单片集成低噪声放大器的噪声系数为1.62~1.90 dB,增益35 dB,输入输出端口反射系数分别小于-16 dB和-13 dB,1 dB压缩点输出功率为13 dBm,工作电流35 mA。单片集成低噪声放大器的芯片面积仅为0.48 mm×0.38 mm。 展开更多
关键词 异质结双极晶体管(hbt) 高增益 宽带 低噪声放大器(LNA) 噪声系数(NF)
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A 10 Gb/s laser diode driver in 0.35 μm SiGe BiCMOS technology
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作者 吴松昌 冯军 +1 位作者 章丽 李伟 《Journal of Southeast University(English Edition)》 EI CAS 2009年第3期309-312,共4页
This paper discusses the design of a 10 Gb/s laser diode driver implemented in SiGe BiCMOS technology. The laser diode driver is composed of an input buffer, a predriver circuit and an output current switch stage. Wit... This paper discusses the design of a 10 Gb/s laser diode driver implemented in SiGe BiCMOS technology. The laser diode driver is composed of an input buffer, a predriver circuit and an output current switch stage. With the current mode logic (CML) structure, the input buffer and the predriver circuit have the capability of transmission and amplification of high speed data. By employing MOS-HBT cascode structure as the output stage, the laser diode driver exhibits very high speed and efficiency working at the 10 Gb/s data rate. The core circuit is operated under a 3. 3 V supply, while the output stage is operated under 5.5 V for sufficient headroom across the laser diode. The chip occupies a die area of 600 μm × 800μm. Measurements on chip show clear electrical eye diagrams over 10 Gb/s, which can well meet the specifications defined by SDH STM64/SONET OC192 and a 10 Gb/s Ethemet eye mask. Under a 5. 5 V supply voltage, the maximum output swing is 3.0 V with a 50 12 load (the corresponding modulation current is 60 mA), and the total power dissipation is 660 mW. 展开更多
关键词 laser diode driver MOS-hbt cascode SiCJe BiCMOS technology
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