The improved current-doubler-rectifier zero-voltage-switching PWM full-bridge converter (CDR ZVS PWM FB converter) achieves ZVS for the switches in a wide load range with the use of the energy stored in the output fil...The improved current-doubler-rectifier zero-voltage-switching PWM full-bridge converter (CDR ZVS PWM FB converter) achieves ZVS for the switches in a wide load range with the use of the energy stored in the output filter inductances, and the rectifier diodes commute naturally, therefore no oscillation and voltage spike occurs. The transformer needs no special manufacture method to limit the leakage inductance. The ZVS achievement and the design considerations for the output filter inductances and the blocking capacitor are discussed for the improved CDR ZVS PWM FB converter. A 540 W prototype converter is built in the lab to verify the operational principle and design considerations for the improved converter, the experimental results are also included.展开更多
A switched-current sample-and-hold circuit with low charge injection was proposed. To obtain low noise and charge injection, the zero-voltage switching was used to remove the signal-dependent charge injection, and the...A switched-current sample-and-hold circuit with low charge injection was proposed. To obtain low noise and charge injection, the zero-voltage switching was used to remove the signal-dependent charge injection, and the signal-independent charge injection was reduced by removing the feed-through voltage from the input port of the memory transistor directly. This current sample-and-hold circuit was implemented using CMOS 180 nm 1.8 V technology. For a 0.8 MHz sinusoidal signal input, the simulated signal-to-noise and distortion ratio and total harmonic distortion were improved from 53.74 dB and -51.24 dB to 56.53 dB and -54.36 dB at the sampling rate of 20 MHz respectively, with accuracy of 9.01 bit and power consumption of 0.44 mW.展开更多
文摘The improved current-doubler-rectifier zero-voltage-switching PWM full-bridge converter (CDR ZVS PWM FB converter) achieves ZVS for the switches in a wide load range with the use of the energy stored in the output filter inductances, and the rectifier diodes commute naturally, therefore no oscillation and voltage spike occurs. The transformer needs no special manufacture method to limit the leakage inductance. The ZVS achievement and the design considerations for the output filter inductances and the blocking capacitor are discussed for the improved CDR ZVS PWM FB converter. A 540 W prototype converter is built in the lab to verify the operational principle and design considerations for the improved converter, the experimental results are also included.
基金Supported by National Natural Science Foundation of China(No.61036004 and No.61076024)
文摘A switched-current sample-and-hold circuit with low charge injection was proposed. To obtain low noise and charge injection, the zero-voltage switching was used to remove the signal-dependent charge injection, and the signal-independent charge injection was reduced by removing the feed-through voltage from the input port of the memory transistor directly. This current sample-and-hold circuit was implemented using CMOS 180 nm 1.8 V technology. For a 0.8 MHz sinusoidal signal input, the simulated signal-to-noise and distortion ratio and total harmonic distortion were improved from 53.74 dB and -51.24 dB to 56.53 dB and -54.36 dB at the sampling rate of 20 MHz respectively, with accuracy of 9.01 bit and power consumption of 0.44 mW.
