The objective of this research is to realize a composite nonlinear feedback control approach for a class of linear and nonlinear systems with parallel-distributed compensation along with sliding mode control technique...The objective of this research is to realize a composite nonlinear feedback control approach for a class of linear and nonlinear systems with parallel-distributed compensation along with sliding mode control technique.The proposed composite nonlinear feedback control approach consists of two parts.In a word,the first part provides the stability of the closed-loop system and the fast convergence response,as long as the second one improves transient response.In this research,the genetic algorithm in line with the fuzzy logic is designed to calculate constant controller coefficients and optimize the control effort.The effectiveness of the proposed design is demonstrated by servo position control system and inverted pendulum system with DC motor simulation results.展开更多
A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase...A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.展开更多
文摘The objective of this research is to realize a composite nonlinear feedback control approach for a class of linear and nonlinear systems with parallel-distributed compensation along with sliding mode control technique.The proposed composite nonlinear feedback control approach consists of two parts.In a word,the first part provides the stability of the closed-loop system and the fast convergence response,as long as the second one improves transient response.In this research,the genetic algorithm in line with the fuzzy logic is designed to calculate constant controller coefficients and optimize the control effort.The effectiveness of the proposed design is demonstrated by servo position control system and inverted pendulum system with DC motor simulation results.
基金Supported by National Natural Science Foundation of China (No.60806010,No.60976030)
文摘A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.
