Radio-over-Fiber （RoF） technologies have been considered to be a promising solution to broadband access and ubiquitous sensing. We present a novel approach using dual-wavelength lights to suppress the nonlinear inte...Radio-over-Fiber （RoF） technologies have been considered to be a promising solution to broadband access and ubiquitous sensing. We present a novel approach using dual-wavelength lights to suppress the nonlinear intermodulation distortion in intensity-modulated RoF link both theoretically and experimentally. The system we proposed rminly consists of two Laser Diodes （LDs） at different wavelengths, a commercial available Mach-Zehnder Modulator （MZM） and a Photo Detector （PD）. More than 25 dB suppression of the Third-order Interrnodulation Distortion （IMD3） is achieved by adjusting the wavelength and opti- cal power of the laser. Besides, the output of the MZM is then sent to the photodetector via a single fiber, which simplifies the system complexity for distrbution of RF signals over long distances.展开更多
A model of correcting the nonlinear error of photoelectric displacement sensor was established based on the least square support vector machine.The parameters of the correcting nonlinear model,such as penalty factor a...A model of correcting the nonlinear error of photoelectric displacement sensor was established based on the least square support vector machine.The parameters of the correcting nonlinear model,such as penalty factor and kernel parameter,were optimized by chaos genetic algorithm.And the nonlinear correction of photoelectric displacement sensor based on least square support vector machine was applied.The application results reveal that error of photoelectric displacement sensor is less than 1.5%,which is rather satisfactory for nonlinear correction of photoelectric displacement sensor.展开更多
A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase...A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.展开更多
基金Acknowledgements This work was supported by the National Basic Research Program of China under Grant No. 2012CB315705 the Hi-Tech Research and Development Program of China under Grant No. 2011AA010306+2 种基金 the National Natural Science Foundation of China under Grants No. 60736002, No. 60932004, No. 61001121, No. 61107058 and No. 61120106001 the Beijing Excellent Doctoral Thesis Project under Grant No. YB20101001301 and the Cooperation Project between Province and Ministries under Grant No. 201013090400112.
文摘Radio-over-Fiber （RoF） technologies have been considered to be a promising solution to broadband access and ubiquitous sensing. We present a novel approach using dual-wavelength lights to suppress the nonlinear intermodulation distortion in intensity-modulated RoF link both theoretically and experimentally. The system we proposed rminly consists of two Laser Diodes （LDs） at different wavelengths, a commercial available Mach-Zehnder Modulator （MZM） and a Photo Detector （PD）. More than 25 dB suppression of the Third-order Interrnodulation Distortion （IMD3） is achieved by adjusting the wavelength and opti- cal power of the laser. Besides, the output of the MZM is then sent to the photodetector via a single fiber, which simplifies the system complexity for distrbution of RF signals over long distances.
基金Project(50925727) supported by the National Fund for Distinguish Young Scholars of ChinaProject(60876022) supported by the National Natural Science Foundation of China+1 种基金Project(2010FJ4141) supported by Hunan Provincial Science and Technology Foundation,ChinaProject supported by the Fund of the Key Construction Academic Subject (Optics) of Hunan Province,China
文摘A model of correcting the nonlinear error of photoelectric displacement sensor was established based on the least square support vector machine.The parameters of the correcting nonlinear model,such as penalty factor and kernel parameter,were optimized by chaos genetic algorithm.And the nonlinear correction of photoelectric displacement sensor based on least square support vector machine was applied.The application results reveal that error of photoelectric displacement sensor is less than 1.5%,which is rather satisfactory for nonlinear correction of photoelectric displacement sensor.
基金Supported by National Natural Science Foundation of China (No.60806010,No.60976030)
文摘A high speed column-parallel CDS/ADC circuit with nonlinearity compensation is proposed in this paper.The correlated double sampling (CDS) and analog-to-digital converter (ADC) functions are integrated in a threephase column-parallel circuit based on two floating gate inverters and switched-capacitor network.The conversion rate of traditional single-slope ADC is speeded up by dividing quantization to coarse step and fine step.A storage capacitor is used to store the result of coarse step and locate the section of ramp signal of fine step,which can reduce the clock step from 2 n to 2 (n/2+1).The floating gate inverters are implemented to reduce the power consumption.Its induced nonlinear offset is cancelled by introducing a compensation module to the input of inverter,which can equalize the coupling path in three phases of the proposed circuit.This circuit is designed and simulated for CMOS image sensor with 640×480 pixel array using Chartered 0.18μm process.Simulation results indicate that the resolution can reach 10-bit and the maximum frame rate can reach 200 frames/s with a main clock of 10MHz.The power consumption of this circuit is less than 36.5μW with a 3.3V power supply.The proposed CDS/ADC circuit is suitable for high resolution and high speed image sensors.
