This paper lenges in the design of discusses some chal- millimeter-wave （mln- wave） circuits and systems for 5th generation （5G） wireless systems in CMOS process. The properties of some passive and active devices ...This paper lenges in the design of discusses some chal- millimeter-wave （mln- wave） circuits and systems for 5th generation （5G） wireless systems in CMOS process. The properties of some passive and active devices such as inductors, capacitors, transmission lines, translbrmers and transistors in mm-wave frequency band are discussed. Self-healing technique dealing with PVT variation, res- onant mode switching technique to enhance frequency tuning range of voltage controlled oscillator （VCO） and dual mode technique for power amplifier （PA） efficiency enhancement are introduced. At last, A fully-integrated 60 GHz 5 Gb/s QPSK transceiver with the transmit/receive （T/R） switch in 65nm CMOS process is introduced. The measured error vector magnitude （EVM） of the TX is -21.9 dB while the bit error rate （BER） of the RX with a -52 dBm sine-wave input is below 8e-7 when transmitting/receiving 5 Gb/s data. The transceiver is powered by 1.0 V and 1.2 V supply （except the phase-frequency detector and charge-pump in the frequency synthesizer which are powered by 2.5 V supply） and con- sumes 135 mW in TX mode and 176 mW in RX mode.展开更多
基金supported in part by the National Natural Science Foundation of China under Grant 61331003 and Grant 61222405
文摘This paper lenges in the design of discusses some chal- millimeter-wave （mln- wave） circuits and systems for 5th generation （5G） wireless systems in CMOS process. The properties of some passive and active devices such as inductors, capacitors, transmission lines, translbrmers and transistors in mm-wave frequency band are discussed. Self-healing technique dealing with PVT variation, res- onant mode switching technique to enhance frequency tuning range of voltage controlled oscillator （VCO） and dual mode technique for power amplifier （PA） efficiency enhancement are introduced. At last, A fully-integrated 60 GHz 5 Gb/s QPSK transceiver with the transmit/receive （T/R） switch in 65nm CMOS process is introduced. The measured error vector magnitude （EVM） of the TX is -21.9 dB while the bit error rate （BER） of the RX with a -52 dBm sine-wave input is below 8e-7 when transmitting/receiving 5 Gb/s data. The transceiver is powered by 1.0 V and 1.2 V supply （except the phase-frequency detector and charge-pump in the frequency synthesizer which are powered by 2.5 V supply） and con- sumes 135 mW in TX mode and 176 mW in RX mode.
