The motivation of this work is to obtain single PI/PID tuning formula for different types of processes with enhanced disturbance rejection performance. The proposed tuning formula consistently gives better performance...The motivation of this work is to obtain single PI/PID tuning formula for different types of processes with enhanced disturbance rejection performance. The proposed tuning formula consistently gives better performance in comparison to several well-known methods at the same degree of robustness for stable, integrating and unstable processes. For the selection of the closed-loop time constant(τc), a guideline is provided over a broad range of time-delay/time-constant ratios on the basis of the peak of maximum sensitivity(Ms). An analysis has been performed for the uncertainty margin with the different process parameters for the robust controller design. It gives the guideline of the Ms-value settings for the PI controller designs based on the process parameters uncertainty. Furthermore, a relationship has been developed between Ms-value and uncertainty margin with the different process parameters(k, τ and θ). Simulation study has been conducted for the broad class of processes and the controllers are tuned to have the same degree of robustness by measuring the maximum sensitivity, Ms, in order to obtain a reasonable comparison.展开更多
With the progress of the railway technology, the railway transportation is becoming more efficient, intelligent and faster. High speed trains, as a major part of the railway transportation, are engaged with passenger&...With the progress of the railway technology, the railway transportation is becoming more efficient, intelligent and faster. High speed trains, as a major part of the railway transportation, are engaged with passenger's safety, and therefore the reliability issue is very important in such vital systems. In this paper, a dependable speed controller core based on FPGA has been developed for high speed trains. To improve the reliability and mitigate single upset faults on basic speed controller, this paper proposes a new effective method which is based on hardware redundancy. In the proposed Hybrid Dual Duplex Redundancy(HDDR) method, the original controller is quadruplicated and correct values are voted through the comparator and error detection unit. We have analyzed the proposed system with Reliability, Availability, Mean time to failure and Security(RAMS) theory in order to evaluate the effectiveness of proposed scheme. Theoretical analysis shows that the Mean Time To Failure(MTTF) of the proposed system is 2.5 times better than the traditional Triple Modular Redundancy(TMR). Furthermore, the fault injection experimental results reveal that the capability of tolerating Single Event Upsets(SEUs) in the proposed method increases up to 7.5 times with respect to a regular speed controller.展开更多
For the problem posed by closely spaced modes, this paper defined the MCC (modal correlation criterion) to measure the degree of correlation between close modes. It was proved that structures with certain features ten...For the problem posed by closely spaced modes, this paper defined the MCC (modal correlation criterion) to measure the degree of correlation between close modes. It was proved that structures with certain features tend to have closely clustered modes and the corresponding mode shapes highly correlated. With this understanding, the closed-form expressions for controllability and observability Grammians were adopted to analyze the impacts of actuator/sensor placement on the controllability/observability of highly correlated close modes. On this basis, the problem of actuator/sensor placement, when the optimization criterion is based on modal controllability/observability, was simplified. Moreover, the dimension of the control/measurement vector in independent modal space control for highly correlated close modes was proved to have the potential to be reduced, therefore fewer actuators and sensors were required in this dimension-reduced control strategy. Finally, the desirable vibration suppression for an example structure showed that the theory and methods of this paper were accurate and effective.展开更多
基金the support provided by King Abdulaziz City for Science and Technology (KACST) through the "KACST Annual Program" at King Fahd University of Petroleum & Minerals (KFUPM) for funding this work through project number AT-32-41
文摘The motivation of this work is to obtain single PI/PID tuning formula for different types of processes with enhanced disturbance rejection performance. The proposed tuning formula consistently gives better performance in comparison to several well-known methods at the same degree of robustness for stable, integrating and unstable processes. For the selection of the closed-loop time constant(τc), a guideline is provided over a broad range of time-delay/time-constant ratios on the basis of the peak of maximum sensitivity(Ms). An analysis has been performed for the uncertainty margin with the different process parameters for the robust controller design. It gives the guideline of the Ms-value settings for the PI controller designs based on the process parameters uncertainty. Furthermore, a relationship has been developed between Ms-value and uncertainty margin with the different process parameters(k, τ and θ). Simulation study has been conducted for the broad class of processes and the controllers are tuned to have the same degree of robustness by measuring the maximum sensitivity, Ms, in order to obtain a reasonable comparison.
文摘With the progress of the railway technology, the railway transportation is becoming more efficient, intelligent and faster. High speed trains, as a major part of the railway transportation, are engaged with passenger's safety, and therefore the reliability issue is very important in such vital systems. In this paper, a dependable speed controller core based on FPGA has been developed for high speed trains. To improve the reliability and mitigate single upset faults on basic speed controller, this paper proposes a new effective method which is based on hardware redundancy. In the proposed Hybrid Dual Duplex Redundancy(HDDR) method, the original controller is quadruplicated and correct values are voted through the comparator and error detection unit. We have analyzed the proposed system with Reliability, Availability, Mean time to failure and Security(RAMS) theory in order to evaluate the effectiveness of proposed scheme. Theoretical analysis shows that the Mean Time To Failure(MTTF) of the proposed system is 2.5 times better than the traditional Triple Modular Redundancy(TMR). Furthermore, the fault injection experimental results reveal that the capability of tolerating Single Event Upsets(SEUs) in the proposed method increases up to 7.5 times with respect to a regular speed controller.
基金supported by the National Natural Science Foundation of China (Grant No. 10872028)
文摘For the problem posed by closely spaced modes, this paper defined the MCC (modal correlation criterion) to measure the degree of correlation between close modes. It was proved that structures with certain features tend to have closely clustered modes and the corresponding mode shapes highly correlated. With this understanding, the closed-form expressions for controllability and observability Grammians were adopted to analyze the impacts of actuator/sensor placement on the controllability/observability of highly correlated close modes. On this basis, the problem of actuator/sensor placement, when the optimization criterion is based on modal controllability/observability, was simplified. Moreover, the dimension of the control/measurement vector in independent modal space control for highly correlated close modes was proved to have the potential to be reduced, therefore fewer actuators and sensors were required in this dimension-reduced control strategy. Finally, the desirable vibration suppression for an example structure showed that the theory and methods of this paper were accurate and effective.
