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用计算机测试系统及辅助方法测试高压大电流功率驱动集成电路
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作者 王广武 《电子质量》 2007年第4期11-13,33,共4页
本文介绍了5406、5407、TC4423、TC4424、TC4425等驱动集成电路的电性能参数,说明了对这类能输出高电压或大电流集成电路的测试原理,给出了以小型微型计算机测试系统为主,加以其它辅助方法进行这类电路包括高电压和大电流的全参数测试... 本文介绍了5406、5407、TC4423、TC4424、TC4425等驱动集成电路的电性能参数,说明了对这类能输出高电压或大电流集成电路的测试原理,给出了以小型微型计算机测试系统为主,加以其它辅助方法进行这类电路包括高电压和大电流的全参数测试的方案。 展开更多
关键词 电压或大电流驱动集成电路 计算机测试系统 辅助测试方法
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IRS2158D的功能与典型应用
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作者 路秋生 《灯与照明》 2009年第2期52-54,共3页
IRS2158D是IR公司新近推测出的一款可调光电子镇流器控制集成电路,具有保护控制功能齐全和使用方便的特点,采用高电压集成电路制造,是一款600 V电子镇流器控制IC,适用于驱动各种型号的荧光灯。
关键词 可调光电子镇流器 高电压集成电路 半桥驱动
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INCREASING BREAKDOWN VOLTAGE OF LDMOST USING BURIED LAYER
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作者 Han Lei Ye Xingning Chen Xingbi (Institute of Microelectronics, University of Electrical Science and Technology of China,, Chengdu 610054) 《Journal of Electronics(China)》 2003年第1期29-32,共4页
A new LDMOST structure, named B-LDMOST that has a buried layer under the drain is proposed. The buried layer is not connected to the drift region, so it can optimize the vertical field distribution and increase breakd... A new LDMOST structure, named B-LDMOST that has a buried layer under the drain is proposed. The buried layer is not connected to the drift region, so it can optimize the vertical field distribution and increase breakdown voltage. The analysis and the simulated results show that B-LDMOST can increase breakdown voltage, with almost negligible influence on the other parameters such as on-resistance, switching time, and so on. 展开更多
关键词 B-LDMOST Buried layer Breakdown voltage Ou-resistance Switching time
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New Level-Shift LDMOS Structure for a 600 V-HVIC on Thick SOl
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作者 Masaharu Yamaji Keisei Abe Akihiro Jonishi Hidenori Takahashi Hitoshi Sumida 《Journal of Energy and Power Engineering》 2012年第9期1515-1520,共6页
A novel level-shift LDMOS (lateral double-diffused metal oxide semiconductor) structure with the HV (high voltage) -interconnection for a 600 V-HVIC (high voltage integrated circuit) on thick SOI (silicon on in... A novel level-shift LDMOS (lateral double-diffused metal oxide semiconductor) structure with the HV (high voltage) -interconnection for a 600 V-HVIC (high voltage integrated circuit) on thick SOI (silicon on insulator) is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600 V. From the proposed structure, the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600 V and high hot carrier instability, and the isolation performance over 1,200 V can be obtained successfully. This paper will show numerical and experimental results in detail. 展开更多
关键词 HVIC SOL level-shift LDMOS HV-interconnection.
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