Flange height and lip accuracy are generally restricted by the formability of sheet metals in the conventional hole-flanging operation. A new hole-flanging process, named upsetting-flanging process, was proposed to ob...Flange height and lip accuracy are generally restricted by the formability of sheet metals in the conventional hole-flanging operation. A new hole-flanging process, named upsetting-flanging process, was proposed to obtain a more substantial flange from thick plate. The finite element method （FEM） with DEFORM was utilized to simulate the novel upsetting-flanging process and the influence of geometric parameters on the flange height was studied in details. A series of flanging experiments with A1050P-O were carried out to validate the FEM results, and the variations of Vicker hardness in the plate section were discussed. The results showed that the newly upsetting-flanging process revealed higher flange height and better lip accuracy than the conventional hole-flanging process, and the results between FEM simulations and experiments showed good agreement. Besides, the hardness of the plate around the flange part increases due to the work hardening after the upsetting-flanging process, which reveals better superiority in strength for the subsequent machining or assembling processes.展开更多
Because of the speed limitation of the conventional bit-selection strategy in the exi- sting weighted bit flipping algorithms, a high- speed Low-Density Parity-Check （LDPC） dec- oder cannot be realised. To solve thi...Because of the speed limitation of the conventional bit-selection strategy in the exi- sting weighted bit flipping algorithms, a high- speed Low-Density Parity-Check （LDPC） dec- oder cannot be realised. To solve this problem, we propose a fast weighted bit flipping algo- rithm. Specifically, based on the identically dis- tributed error bits, a parallel bit-selection met- hod is proposed to reduce the selection delay of the flipped bits. The delay analysis demon- strates that, the decoding speed of LDPC codes can be significantly improved by the proposed algorithm. Furthermore, simulation results ver- ify the validity of the proposed algorithm.展开更多
For improving the translation quality of transfer-based MT system,a new metric for rule evaluation was proposed and applied to rule-base optimization.At the same time,a frequency filter was used to delete redundance b...For improving the translation quality of transfer-based MT system,a new metric for rule evaluation was proposed and applied to rule-base optimization.At the same time,a frequency filter was used to delete redundance before new acquired rules were added into rule-base.The new optimization method was applied to a general MT system.Experimental results show that the frequency filter is helpful to provide the knowledge expansion space of MT system for new acquired rules.The translation assessment score of open test corpus (including 2500 Chinese sentences) obtained is increased by 3.58% under 5-gram Nist metric,which is two times of that obtained by previous methods.展开更多
Rh(Ⅲ)-catalyzed, chelation-assisted oxidative C-H imidation of arenes with N-H imide have been realized using PhI(OAc)2 as an oxidant. This transformation exhibits a broad substrate scope and tolerates various functi...Rh(Ⅲ)-catalyzed, chelation-assisted oxidative C-H imidation of arenes with N-H imide have been realized using PhI(OAc)2 as an oxidant. This transformation exhibits a broad substrate scope and tolerates various functional groups. The reaction proceeded via in situ generation of an iodine(Ⅲ) imido. DFT calculations suggest that this oxidative imidaton system proceeds via a Rh(Ⅲ)-Rh(Ⅴ)-Rh(Ⅲ) pathway.展开更多
The lack of standard to electronic circuits modeling made possible the development of many tools and modeling languages for electronic circuits. In this way, several tools to be used on different descriptions stage of...The lack of standard to electronic circuits modeling made possible the development of many tools and modeling languages for electronic circuits. In this way, several tools to be used on different descriptions stage of the designs are necessary. This paper presents a tool called SF^2HDL （Stateflow to Hardware Description Language or State Transition Table） that translates a finite state machine on state transition diagram representation, described by Stateflow tool, into an input file standard for TABELA program or into a file behavioral VHDL （Very High Speed Integrated Circuits Hardware Description Language） directly. The TABELA program was used to optimization this finite state machine. After that, the TAB2VHDL program was used to generate the VHDL code on register transfer level, what permits comparisons with results obtained by synthesis. The finite state machine must be described by Mealy model and the user can describe the machine on high level abstraction using all Simulink supports. The tool was very efficient on computational cost and it made translation of several cases, for the two VHDL description models. Every state machine translated was simulated and implemented on device EP2C20F484C7 using Quartus II environment.展开更多
基金Project(51175445)supported by the National Natural Science Foundation of ChinaProject(2010DFA52130)supported by the International Cooperation Project of the Ministry of Science and Technology,ChinaProject(CX2013B277)supported by Hunan Provincial Innovation Foundation for Postgraduate,China
文摘Flange height and lip accuracy are generally restricted by the formability of sheet metals in the conventional hole-flanging operation. A new hole-flanging process, named upsetting-flanging process, was proposed to obtain a more substantial flange from thick plate. The finite element method （FEM） with DEFORM was utilized to simulate the novel upsetting-flanging process and the influence of geometric parameters on the flange height was studied in details. A series of flanging experiments with A1050P-O were carried out to validate the FEM results, and the variations of Vicker hardness in the plate section were discussed. The results showed that the newly upsetting-flanging process revealed higher flange height and better lip accuracy than the conventional hole-flanging process, and the results between FEM simulations and experiments showed good agreement. Besides, the hardness of the plate around the flange part increases due to the work hardening after the upsetting-flanging process, which reveals better superiority in strength for the subsequent machining or assembling processes.
基金supported in part by the National Natural Science Foundation of China under Grant No.61072069the Fundamental Research Funds for the Central Universities under Grant No.72001859+1 种基金the Important National Science and Technology Specific Projects under Grant No.2011ZX03003-001-04the One Church,One Family,One Purpose Project(111 Project)under Grant No.B08038
文摘Because of the speed limitation of the conventional bit-selection strategy in the exi- sting weighted bit flipping algorithms, a high- speed Low-Density Parity-Check （LDPC） dec- oder cannot be realised. To solve this problem, we propose a fast weighted bit flipping algo- rithm. Specifically, based on the identically dis- tributed error bits, a parallel bit-selection met- hod is proposed to reduce the selection delay of the flipped bits. The delay analysis demon- strates that, the decoding speed of LDPC codes can be significantly improved by the proposed algorithm. Furthermore, simulation results ver- ify the validity of the proposed algorithm.
基金Sponsored by the High Technology Research and Development Program of China (Grant No.2002AA117010-09)the National Natural Science Foun-dation of China (Grant No. 60375019)
文摘For improving the translation quality of transfer-based MT system,a new metric for rule evaluation was proposed and applied to rule-base optimization.At the same time,a frequency filter was used to delete redundance before new acquired rules were added into rule-base.The new optimization method was applied to a general MT system.Experimental results show that the frequency filter is helpful to provide the knowledge expansion space of MT system for new acquired rules.The translation assessment score of open test corpus (including 2500 Chinese sentences) obtained is increased by 3.58% under 5-gram Nist metric,which is two times of that obtained by previous methods.
文摘Rh(Ⅲ)-catalyzed, chelation-assisted oxidative C-H imidation of arenes with N-H imide have been realized using PhI(OAc)2 as an oxidant. This transformation exhibits a broad substrate scope and tolerates various functional groups. The reaction proceeded via in situ generation of an iodine(Ⅲ) imido. DFT calculations suggest that this oxidative imidaton system proceeds via a Rh(Ⅲ)-Rh(Ⅴ)-Rh(Ⅲ) pathway.
文摘The lack of standard to electronic circuits modeling made possible the development of many tools and modeling languages for electronic circuits. In this way, several tools to be used on different descriptions stage of the designs are necessary. This paper presents a tool called SF^2HDL （Stateflow to Hardware Description Language or State Transition Table） that translates a finite state machine on state transition diagram representation, described by Stateflow tool, into an input file standard for TABELA program or into a file behavioral VHDL （Very High Speed Integrated Circuits Hardware Description Language） directly. The TABELA program was used to optimization this finite state machine. After that, the TAB2VHDL program was used to generate the VHDL code on register transfer level, what permits comparisons with results obtained by synthesis. The finite state machine must be described by Mealy model and the user can describe the machine on high level abstraction using all Simulink supports. The tool was very efficient on computational cost and it made translation of several cases, for the two VHDL description models. Every state machine translated was simulated and implemented on device EP2C20F484C7 using Quartus II environment.
