With the progress of the railway technology, the railway transportation is becoming more efficient, intelligent and faster. High speed trains, as a major part of the railway transportation, are engaged with passenger&...With the progress of the railway technology, the railway transportation is becoming more efficient, intelligent and faster. High speed trains, as a major part of the railway transportation, are engaged with passenger's safety, and therefore the reliability issue is very important in such vital systems. In this paper, a dependable speed controller core based on FPGA has been developed for high speed trains. To improve the reliability and mitigate single upset faults on basic speed controller, this paper proposes a new effective method which is based on hardware redundancy. In the proposed Hybrid Dual Duplex Redundancy(HDDR) method, the original controller is quadruplicated and correct values are voted through the comparator and error detection unit. We have analyzed the proposed system with Reliability, Availability, Mean time to failure and Security(RAMS) theory in order to evaluate the effectiveness of proposed scheme. Theoretical analysis shows that the Mean Time To Failure(MTTF) of the proposed system is 2.5 times better than the traditional Triple Modular Redundancy(TMR). Furthermore, the fault injection experimental results reveal that the capability of tolerating Single Event Upsets(SEUs) in the proposed method increases up to 7.5 times with respect to a regular speed controller.展开更多
当前,高频换流器实时仿真在仿真精度和仿真灵活性上难以兼顾。为此采用了基于FPGA+PC的实时多速率协同仿真方法,全面展示了多速率协同仿真系统的仿真原理,以及硬件设计与实现。在30 k Hz/50 k Hz三相两电平逆变算例仿真的研究中,呈现了...当前,高频换流器实时仿真在仿真精度和仿真灵活性上难以兼顾。为此采用了基于FPGA+PC的实时多速率协同仿真方法,全面展示了多速率协同仿真系统的仿真原理,以及硬件设计与实现。在30 k Hz/50 k Hz三相两电平逆变算例仿真的研究中,呈现了换流器建模、算例模型分割和电路求解器实现。以离线精确模型为基准,将多速率协同仿真平台与PC实时仿真平台的实验结果从仿真波形、仿真误差及实时性方面进行比较。结果表明,在开关频率50 k Hz以下多速率仿真的速率转换误差收敛,电磁暂态仿真欧式范数误差达到1%左右,仿真平台仿真步长达到500 ns。该方法提高了高频换流器实时仿真精度、减小了仿真步长,为高性能协同仿真平台的设计提供了参考。展开更多
This paper presents a flexible and high speed digital scan converter (DSC) with the ability to handle high frequency ultrasound imaging in real-time. The characteristics in imaging system such as focus length of trans...This paper presents a flexible and high speed digital scan converter (DSC) with the ability to handle high frequency ultrasound imaging in real-time. The characteristics in imaging system such as focus length of transducer, the swing radius and sampling length etc. could be changed easily in compliance with the researcher's application based on this flexible digital scan converter. Linear interpolation is employed to achieve the coordinate transformations algorithm. Custom-built software is programmed to preliminarily handle the algorithm according to different ultrasound imaging applications. High performance FPGA will implement high speed interpolation calculation based on the preliminary data which are stored in the DDR2 SDRAM from the software. 64 bit 66 MHz PCI is employed to accomplish high speed data transmission. Experiment has shown that more than 500 frame rate could be achieved based on this high speed digital scan converter. The designed flexible and high speed digital scan converter could be used in current FPGA based high frequency ultrasound imaging system.展开更多
文摘With the progress of the railway technology, the railway transportation is becoming more efficient, intelligent and faster. High speed trains, as a major part of the railway transportation, are engaged with passenger's safety, and therefore the reliability issue is very important in such vital systems. In this paper, a dependable speed controller core based on FPGA has been developed for high speed trains. To improve the reliability and mitigate single upset faults on basic speed controller, this paper proposes a new effective method which is based on hardware redundancy. In the proposed Hybrid Dual Duplex Redundancy(HDDR) method, the original controller is quadruplicated and correct values are voted through the comparator and error detection unit. We have analyzed the proposed system with Reliability, Availability, Mean time to failure and Security(RAMS) theory in order to evaluate the effectiveness of proposed scheme. Theoretical analysis shows that the Mean Time To Failure(MTTF) of the proposed system is 2.5 times better than the traditional Triple Modular Redundancy(TMR). Furthermore, the fault injection experimental results reveal that the capability of tolerating Single Event Upsets(SEUs) in the proposed method increases up to 7.5 times with respect to a regular speed controller.
文摘当前,高频换流器实时仿真在仿真精度和仿真灵活性上难以兼顾。为此采用了基于FPGA+PC的实时多速率协同仿真方法,全面展示了多速率协同仿真系统的仿真原理,以及硬件设计与实现。在30 k Hz/50 k Hz三相两电平逆变算例仿真的研究中,呈现了换流器建模、算例模型分割和电路求解器实现。以离线精确模型为基准,将多速率协同仿真平台与PC实时仿真平台的实验结果从仿真波形、仿真误差及实时性方面进行比较。结果表明,在开关频率50 k Hz以下多速率仿真的速率转换误差收敛,电磁暂态仿真欧式范数误差达到1%左右,仿真平台仿真步长达到500 ns。该方法提高了高频换流器实时仿真精度、减小了仿真步长,为高性能协同仿真平台的设计提供了参考。
文摘This paper presents a flexible and high speed digital scan converter (DSC) with the ability to handle high frequency ultrasound imaging in real-time. The characteristics in imaging system such as focus length of transducer, the swing radius and sampling length etc. could be changed easily in compliance with the researcher's application based on this flexible digital scan converter. Linear interpolation is employed to achieve the coordinate transformations algorithm. Custom-built software is programmed to preliminarily handle the algorithm according to different ultrasound imaging applications. High performance FPGA will implement high speed interpolation calculation based on the preliminary data which are stored in the DDR2 SDRAM from the software. 64 bit 66 MHz PCI is employed to accomplish high speed data transmission. Experiment has shown that more than 500 frame rate could be achieved based on this high speed digital scan converter. The designed flexible and high speed digital scan converter could be used in current FPGA based high frequency ultrasound imaging system.
