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EXACT ANALYSIS OF SPURIOUS SIGNALS IN DIRECT DIGITAL FREQUENCY SYNTHESIZERS DUE TO AMPLITUDE QUANTIZATION
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作者 Tian Xinguang Zhang Eryang 《Journal of Electronics(China)》 2009年第4期448-455,共8页
Amplitude quantization is one of the main sources of spurious noise frequencies in Direct Digital Frequency Synthesizers (DDFSs), which affect their application to many wireless telecommu- nication systems. In this pa... Amplitude quantization is one of the main sources of spurious noise frequencies in Direct Digital Frequency Synthesizers (DDFSs), which affect their application to many wireless telecommu- nication systems. In this paper, two different kinds of spurious signals due to amplitude quantization in DDFSs are exactly formulated in the time domain and detailedly compared in the frequency do- main, and the effects of the DDFS parameter variations on the spurious performance are thoroughly studied. Then the spectral properties and power levels of the amplitude-quantization spurs in the absence of phase-accumulator truncation are emphatically analyzed by waveform estimation and computer simulation, and several important conclusions are derived which can provide theoretical support for parameter choice and spurious performance evaluation in the application of DDFSs. 展开更多
关键词 Direct Digital Frequency Synthesizer (ddfs) SPUR Amplitude quantization Phase truncation
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A high speed direct digital frequency synthesizer based on multi-channel structure
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作者 袁凌 张强 石寅 《Journal of Semiconductors》 EI CAS CSCD 2015年第6期131-135,共5页
This paper presents a direct digital frequency synthesizer (DDFS) for high speed application based on multi-channel structure. This DDFS has phase resolution of 32 bits and magnitude resolution of 12 bits. In order ... This paper presents a direct digital frequency synthesizer (DDFS) for high speed application based on multi-channel structure. This DDFS has phase resolution of 32 bits and magnitude resolution of 12 bits. In order to ensure the high speed and high resolution at the same time, the multi-channel sampling technique is used and a 12 bits linear digital-to-analog converter is implemented. The chip is fabricated in TSMC 130 nm CMOS technology with active area of 0.89 x 0.98 mm2 and total power consumption of 300 mW at a single 1.2 V supply voltage. The maximum operating speed is up to 2.0 GHz at room temperature. 展开更多
关键词 direct digital frequency synthesizer (ddfs) MULTI-CHANNEL phase-to-sine-amplitude converters(PSAC)
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