In this paper, thermal effects and Drain Induced barrier lowering (DIBL) of silicon-on-insulator (SOI) and silicon-on-diamond (SOD) transistors with 22 nm channel lengths using hydrodynamic simulations have been inves...In this paper, thermal effects and Drain Induced barrier lowering (DIBL) of silicon-on-insulator (SOI) and silicon-on-diamond (SOD) transistors with 22 nm channel lengths using hydrodynamic simulations have been investigated. Thermal conductivity of diamond in contrast to thermal conductivity of silicon dioxide is significantly higher. Hence, the heat transfers faster in silicon-on-diamond transistors. Lattice temperature of SODs is lower than that of similar SOIs. By using SODs in Integrated circuits with the first transistor turning on and active, neighboring transistors will have the same level of heat as the active transistor. As a result, the DIBL factor will be increased;this is an undesired phenomenon in CMOS applications. To resolve this issue, we propose a new method which is the thickness reduction of buried diamond layers inside of transistors. Due to this change, DIBL of active transistor will be improved, the exceeding lattice heat of side transistors will be evacuated through the devices and their temperatures will be deduced in large scale.展开更多
随着栅极长度、硅膜厚度以及埋氧层厚度的减小,MOS器件短沟道效应变得越来越严峻。本文首先给出了决定全耗尽绝缘体上硅短沟道效应的三种机制;然后从接地层、埋层工程、沟道工程、源漏工程、侧墙工程和栅工程等六种工程技术方面讨论了...随着栅极长度、硅膜厚度以及埋氧层厚度的减小,MOS器件短沟道效应变得越来越严峻。本文首先给出了决定全耗尽绝缘体上硅短沟道效应的三种机制;然后从接地层、埋层工程、沟道工程、源漏工程、侧墙工程和栅工程等六种工程技术方面讨论了为抑制短沟道效应而引入的不同UTBB SOI MOSFETs结构,分析了这些结构能够有效抑制短沟道效应(如漏致势垒降低、亚阈值摆幅、关态泄露电流、开态电流等)的机理;而后基于这六种技术,对近年来在UTBB SOI MOSFETs短沟道效应抑制方面所做的工作进行了总结;最后对未来技术的发展进行了展望。展开更多
Total ionizing dose responses of different transistor geometries after being irradiated by ^（60）Co γ-rays, in 0.13-μm partially-depleted silicon-on-insulator（PD SOI） technology are investigated. The negative thr...Total ionizing dose responses of different transistor geometries after being irradiated by ^（60）Co γ-rays, in 0.13-μm partially-depleted silicon-on-insulator（PD SOI） technology are investigated. The negative threshold voltage shift in an n-type metal-oxide semiconductor field effect transistor（nMOSFET） is inversely proportional to the channel width due to radiation-induced charges trapped in trench oxide, which is called the radiation-induced narrow channel effect（RINCE）.The analysis based on a charge sharing model and three-dimensional technology computer aided design（TCAD） simulations demonstrate that phenomenon. The radiation-induced leakage currents under different drain biases are also discussed in detail.展开更多
N and P-channel groove-gate MOSFETs based on a self-aligned CMOS process have been fabricated and characterized. For the devices with channel length of 140nm, the measured drain induced barrier lowering （DIBL） was 6...N and P-channel groove-gate MOSFETs based on a self-aligned CMOS process have been fabricated and characterized. For the devices with channel length of 140nm, the measured drain induced barrier lowering （DIBL） was 66mV/V for n-MOSFETs and 82mV/V for p-MOSFETs. The substrate current of a groove-gate n-MOSFET was 150 times less than that of a conventional planar n-MOSFET, These results demonstrate that groove-gate MOSFETs have excellent capabilities in suppressing short-channel effects. It is worth emphasizing that our groove-gate MOSFET devices are fabricated by using a simple process flow, with the potential of fabricating devices in the sub-100nm range.展开更多
Different channel lengths and layouts on 0.18μm NMOS transistors are designed for investigating the dependence of short channel effects(SCEs)on the width of shallow trench isolation(STI)devices and designing in radia...Different channel lengths and layouts on 0.18μm NMOS transistors are designed for investigating the dependence of short channel effects(SCEs)on the width of shallow trench isolation(STI)devices and designing in radiation hardness.Results show that,prior to irradiation,the devices exhibited near–ideal I–V characteristics,with no significant SCEs.Following irradiation,no noticeable shift of threshold voltage is observed,radiation–induced edge–leakage current,however,exhibits significant sensitivity on TID.Moreover,radiation–enhanced drain induced barrier lowering(DIBL)and channel length modulation(CLM)effects are observed on short–channel NMOS transistors.Comparing to stripe–gate layout,enclosed–gate layout has excellent radiation tolerance.展开更多
文摘In this paper, thermal effects and Drain Induced barrier lowering (DIBL) of silicon-on-insulator (SOI) and silicon-on-diamond (SOD) transistors with 22 nm channel lengths using hydrodynamic simulations have been investigated. Thermal conductivity of diamond in contrast to thermal conductivity of silicon dioxide is significantly higher. Hence, the heat transfers faster in silicon-on-diamond transistors. Lattice temperature of SODs is lower than that of similar SOIs. By using SODs in Integrated circuits with the first transistor turning on and active, neighboring transistors will have the same level of heat as the active transistor. As a result, the DIBL factor will be increased;this is an undesired phenomenon in CMOS applications. To resolve this issue, we propose a new method which is the thickness reduction of buried diamond layers inside of transistors. Due to this change, DIBL of active transistor will be improved, the exceeding lattice heat of side transistors will be evacuated through the devices and their temperatures will be deduced in large scale.
文摘随着栅极长度、硅膜厚度以及埋氧层厚度的减小,MOS器件短沟道效应变得越来越严峻。本文首先给出了决定全耗尽绝缘体上硅短沟道效应的三种机制;然后从接地层、埋层工程、沟道工程、源漏工程、侧墙工程和栅工程等六种工程技术方面讨论了为抑制短沟道效应而引入的不同UTBB SOI MOSFETs结构,分析了这些结构能够有效抑制短沟道效应(如漏致势垒降低、亚阈值摆幅、关态泄露电流、开态电流等)的机理;而后基于这六种技术,对近年来在UTBB SOI MOSFETs短沟道效应抑制方面所做的工作进行了总结;最后对未来技术的发展进行了展望。
基金Project supported by the Weapon Equipment Pre-Research Foundation of China(Grant No.9140A11020114ZK34147)the Shanghai Municipal Natural Science Foundation,China(Grant No.15ZR1447100)
文摘Total ionizing dose responses of different transistor geometries after being irradiated by ^（60）Co γ-rays, in 0.13-μm partially-depleted silicon-on-insulator（PD SOI） technology are investigated. The negative threshold voltage shift in an n-type metal-oxide semiconductor field effect transistor（nMOSFET） is inversely proportional to the channel width due to radiation-induced charges trapped in trench oxide, which is called the radiation-induced narrow channel effect（RINCE）.The analysis based on a charge sharing model and three-dimensional technology computer aided design（TCAD） simulations demonstrate that phenomenon. The radiation-induced leakage currents under different drain biases are also discussed in detail.
基金Project supported by the National Natural Science Foundation of China （Grant No 60376024）.
文摘N and P-channel groove-gate MOSFETs based on a self-aligned CMOS process have been fabricated and characterized. For the devices with channel length of 140nm, the measured drain induced barrier lowering （DIBL） was 66mV/V for n-MOSFETs and 82mV/V for p-MOSFETs. The substrate current of a groove-gate n-MOSFET was 150 times less than that of a conventional planar n-MOSFET, These results demonstrate that groove-gate MOSFETs have excellent capabilities in suppressing short-channel effects. It is worth emphasizing that our groove-gate MOSFET devices are fabricated by using a simple process flow, with the potential of fabricating devices in the sub-100nm range.
基金Supported by National Laboratory Analog Integrated Circuit Foundation(No.9140C090402110C0906)
文摘Different channel lengths and layouts on 0.18μm NMOS transistors are designed for investigating the dependence of short channel effects(SCEs)on the width of shallow trench isolation(STI)devices and designing in radiation hardness.Results show that,prior to irradiation,the devices exhibited near–ideal I–V characteristics,with no significant SCEs.Following irradiation,no noticeable shift of threshold voltage is observed,radiation–induced edge–leakage current,however,exhibits significant sensitivity on TID.Moreover,radiation–enhanced drain induced barrier lowering(DIBL)and channel length modulation(CLM)effects are observed on short–channel NMOS transistors.Comparing to stripe–gate layout,enclosed–gate layout has excellent radiation tolerance.
