Gao＇s viscous/in-viscid interacting shear flows （ISF） theory, proposed by professor Gao Zhi in Institute of Mechanics, China Academy of Science, and its inferences and their applications in computational fluid dyna...Gao＇s viscous/in-viscid interacting shear flows （ISF） theory, proposed by professor Gao Zhi in Institute of Mechanics, China Academy of Science, and its inferences and their applications in computational fluid dynamics （CFD） are reviewed and some subjects worthy to be studied are pro- posed in this paper. The flow-field and motion law of ISF, mathematics definition of strong viscous shear layer flow in ISF, ISF equations, wall-surface compatibility criteria （Gao＇s criteria ）, space scale variety law of strong viscous shear layer reveals flow mechanism and local space small scale triggered by strong interaction that cause some abnormal severe local pneumatic heating phenomenon in hypersonic flow. Gao＇s ISF theory was used in near wall flow, free ISF flow simulation and design of computing grids, Gao＇s wall-surface criteria were used to verify calculation reliability and accuracy of near wall flows, ISF theory approximate analytical result of shock waves-boundary layer interac- tion and ISF equations were used to obtain the numerical exact solution of local area flow （ such as stationary point flow）. Some new subjects, such as, improving near-wall turbulent models according to the turbulent flow simulation satisfying the wall-criteria and illustrating relation between grid-con- vergence based on the wall criteria and other convergence tactics, are suggested. The necessity of applying Gao＇s ISF theory and wall criteria is revealed. Difficulties and importance of hypersonic vis- cous/in-viscid interaction phenomenon were also emphasized.展开更多
A low jitter All-Digital Phase-Locked Loop(ADPLL) used as a clock generator is designed.The Digital-Controlled Oscillator(DCO) for this ADPLL is a seven-stage ring oscillator with the delay of each stage changeable.Ba...A low jitter All-Digital Phase-Locked Loop(ADPLL) used as a clock generator is designed.The Digital-Controlled Oscillator(DCO) for this ADPLL is a seven-stage ring oscillator with the delay of each stage changeable.Based on the Impulse Sensitivity Function(ISF) analysis,an effective way is proposed to reduce the ADPLL's jitter by the careful design of the sizes of the inverters used in the DCO with a simple architecture other than a complex one.The ADPLL is implemented in a 0.18μm CMOS process with 1.8V supply voltage,occupies 0.046mm2 of on-chip area.According to the measured results,the ADPLL can operate from 108MHz to 304MHz,and the peak-to-peak jitter is 139ps when the DCO's output frequency is 188MHz.展开更多
基金Supported by the National Natural Science Foundation(10702009)
文摘Gao＇s viscous/in-viscid interacting shear flows （ISF） theory, proposed by professor Gao Zhi in Institute of Mechanics, China Academy of Science, and its inferences and their applications in computational fluid dynamics （CFD） are reviewed and some subjects worthy to be studied are pro- posed in this paper. The flow-field and motion law of ISF, mathematics definition of strong viscous shear layer flow in ISF, ISF equations, wall-surface compatibility criteria （Gao＇s criteria ）, space scale variety law of strong viscous shear layer reveals flow mechanism and local space small scale triggered by strong interaction that cause some abnormal severe local pneumatic heating phenomenon in hypersonic flow. Gao＇s ISF theory was used in near wall flow, free ISF flow simulation and design of computing grids, Gao＇s wall-surface criteria were used to verify calculation reliability and accuracy of near wall flows, ISF theory approximate analytical result of shock waves-boundary layer interac- tion and ISF equations were used to obtain the numerical exact solution of local area flow （ such as stationary point flow）. Some new subjects, such as, improving near-wall turbulent models according to the turbulent flow simulation satisfying the wall-criteria and illustrating relation between grid-con- vergence based on the wall criteria and other convergence tactics, are suggested. The necessity of applying Gao＇s ISF theory and wall criteria is revealed. Difficulties and importance of hypersonic vis- cous/in-viscid interaction phenomenon were also emphasized.
文摘A low jitter All-Digital Phase-Locked Loop(ADPLL) used as a clock generator is designed.The Digital-Controlled Oscillator(DCO) for this ADPLL is a seven-stage ring oscillator with the delay of each stage changeable.Based on the Impulse Sensitivity Function(ISF) analysis,an effective way is proposed to reduce the ADPLL's jitter by the careful design of the sizes of the inverters used in the DCO with a simple architecture other than a complex one.The ADPLL is implemented in a 0.18μm CMOS process with 1.8V supply voltage,occupies 0.046mm2 of on-chip area.According to the measured results,the ADPLL can operate from 108MHz to 304MHz,and the peak-to-peak jitter is 139ps when the DCO's output frequency is 188MHz.
