FCL （fault current limiter） is used to solve relays miscoordination problem arises from DG （distributed generation） installation. In most published researches, different optimization methods are developed to obtai...FCL （fault current limiter） is used to solve relays miscoordination problem arises from DG （distributed generation） installation. In most published researches, different optimization methods are developed to obtain optimal relay settings to achieve coordination in case of not installing DG, then depending on the achieved optimal obtained relay settings, FCL impedance is deduced to ensure relays coordination restoration in case of installing DG. Based on original optimal relay settings, obtained FCL impedance is not the minimum one required to achieve relay coordination. The contribution of this paper is the generation of multi sets of original relay settings that increase the possibility of finding FCL impedance of minimum value which is lower than the calculated value based on original optimal relay settings. The proposed method achieves better economic target by reducing FCL impedance. The proposed approach is implemented and tested on IEEE-39 bus test system.展开更多
文摘FCL （fault current limiter） is used to solve relays miscoordination problem arises from DG （distributed generation） installation. In most published researches, different optimization methods are developed to obtain optimal relay settings to achieve coordination in case of not installing DG, then depending on the achieved optimal obtained relay settings, FCL impedance is deduced to ensure relays coordination restoration in case of installing DG. Based on original optimal relay settings, obtained FCL impedance is not the minimum one required to achieve relay coordination. The contribution of this paper is the generation of multi sets of original relay settings that increase the possibility of finding FCL impedance of minimum value which is lower than the calculated value based on original optimal relay settings. The proposed method achieves better economic target by reducing FCL impedance. The proposed approach is implemented and tested on IEEE-39 bus test system.
