This study demonstrates a simple 2-bit phased array operating at 27 GHz that supports one-dimensional beam scanning with left-handed circular polarization(LHCP).The antenna is constructed using a compact four-layer pr...This study demonstrates a simple 2-bit phased array operating at 27 GHz that supports one-dimensional beam scanning with left-handed circular polarization(LHCP).The antenna is constructed using a compact four-layer printed circuit board(PCB)structure,consisting of a 90°phase shifter layer with microstrip structures,a ground(GND)layer,a direct current(DC)control layer,and a circularly polarized annular radiation patch layer with 1-bit phase shifting.Based on the proposed unit structure,a 1×8 array with half-wavelength inter-element spacing was designed and validated.Experimental results show that the array achieves a peak gain of 10.23 dBi and is capable of beam scanning within±50°.展开更多
本文介绍了一种基于2 bit阶梯波时间调制(step-wave time-modulation,SWTM)的高精度幅度调控方法。首先建立了2 bit SWTM理论模型,分析了阶梯波形对射频信号时间调制的幅度调控精度影响;然后设计了2 bit SWTM电路,进行了高精度幅度调控...本文介绍了一种基于2 bit阶梯波时间调制(step-wave time-modulation,SWTM)的高精度幅度调控方法。首先建立了2 bit SWTM理论模型,分析了阶梯波形对射频信号时间调制的幅度调控精度影响;然后设计了2 bit SWTM电路,进行了高精度幅度调控实验。测试结果表明,在40 MHz信号带宽下,该2 bit SWTM电路实现了0~31.75 dB衰减动态范围的7 bit幅度调控,误差范围小于±(0.1+0.8%AS)dB,均方根误差为0.07 dB。展开更多
A fully self-aligned symmetrical split-gate cell structure for 2-bit per cell flash memory with a very competitive bit size is presented. One common select gate is located between two floating gates and a pair of sour...A fully self-aligned symmetrical split-gate cell structure for 2-bit per cell flash memory with a very competitive bit size is presented. One common select gate is located between two floating gates and a pair of source/drain junctions are shared by the 2 bits. The fabrication method utilized here to create a self-aligned structure is to form a spacer against the prior layer without any additional mask. Although the cell consists of three channels in a series, the attributes from conventional split gate flash are still preserved with appropriate bias conditions. Program and erase operation is performed by using a source side injection （SSI） and a poly-to-poly tunneling mechanism respectively.展开更多
基金supported in part by the National Natural Science Foundation of China under Grant No.62171103in part by the National Natural Science Foundation of China“111”Project under Grant No.BP0719011.
文摘This study demonstrates a simple 2-bit phased array operating at 27 GHz that supports one-dimensional beam scanning with left-handed circular polarization(LHCP).The antenna is constructed using a compact four-layer printed circuit board(PCB)structure,consisting of a 90°phase shifter layer with microstrip structures,a ground(GND)layer,a direct current(DC)control layer,and a circularly polarized annular radiation patch layer with 1-bit phase shifting.Based on the proposed unit structure,a 1×8 array with half-wavelength inter-element spacing was designed and validated.Experimental results show that the array achieves a peak gain of 10.23 dBi and is capable of beam scanning within±50°.
文摘本文介绍了一种基于2 bit阶梯波时间调制(step-wave time-modulation,SWTM)的高精度幅度调控方法。首先建立了2 bit SWTM理论模型,分析了阶梯波形对射频信号时间调制的幅度调控精度影响;然后设计了2 bit SWTM电路,进行了高精度幅度调控实验。测试结果表明,在40 MHz信号带宽下,该2 bit SWTM电路实现了0~31.75 dB衰减动态范围的7 bit幅度调控,误差范围小于±(0.1+0.8%AS)dB,均方根误差为0.07 dB。
文摘A fully self-aligned symmetrical split-gate cell structure for 2-bit per cell flash memory with a very competitive bit size is presented. One common select gate is located between two floating gates and a pair of source/drain junctions are shared by the 2 bits. The fabrication method utilized here to create a self-aligned structure is to form a spacer against the prior layer without any additional mask. Although the cell consists of three channels in a series, the attributes from conventional split gate flash are still preserved with appropriate bias conditions. Program and erase operation is performed by using a source side injection （SSI） and a poly-to-poly tunneling mechanism respectively.
