3D NAND Flash制造工艺的快速发展,在提高存储密度降低成本的同时,也带来了新的存储特性。对3DFlash存储特性的研究,有利于其进一步的应用和发展。采用S281芯片为控制芯设计了3DFlash通用测试平台,实验结果表明,该平台可以实现对所有型...3D NAND Flash制造工艺的快速发展,在提高存储密度降低成本的同时,也带来了新的存储特性。对3DFlash存储特性的研究,有利于其进一步的应用和发展。采用S281芯片为控制芯设计了3DFlash通用测试平台,实验结果表明,该平台可以实现对所有型号Flash的时序验证,同时还可以用于3DFlash的特性分析,通过实测得到的存储特性数据进一步验证了平台设计的可靠性。展开更多
For 3D vertical NAND flash memory, the charge pump output load is much larger than that of the planar NAND, resulting in the performance degradation of the conventional Dickson charge pump. Therefore, a novel all PMOS...For 3D vertical NAND flash memory, the charge pump output load is much larger than that of the planar NAND, resulting in the performance degradation of the conventional Dickson charge pump. Therefore, a novel all PMOS charge pump with high voltage boosting efficiency, large driving capability and high power efficiency for 3D V-NAND has been proposed. In this circuit, the Pellieoni structure is used to enhance the driving capability, two auxiliary substrate bias PMOS transistors are added to mitigate the body effect, and the degradation of the output voltage and boost efficiency caused by the threshold voltage drop is eliminated by dynamic gate control structure. Simulated results show that the proposed charge pump circuit can achieve the maximum boost efficiency of 86% and power efficiency of 50%. The output voltage of the proposed 9 stages charge pump can exceed 2 V under 2 MHz clock frequency in 2X nm 3D V-NAND technology. Our results provide guidance for the peripheral circuit design of high density 3D V-NAND integration.展开更多
由于阈值电压(threshold voltage,VTH)的偏移,3DNAND闪存可靠性很容易受到温度变化的影响,这将进一步恶化读取裕度.为了解决这一问题,本文提出了一种具有负温度系数的读电压基准发生器来补偿阈值电压随温度的变化.本文所提出的具有负温...由于阈值电压(threshold voltage,VTH)的偏移,3DNAND闪存可靠性很容易受到温度变化的影响,这将进一步恶化读取裕度.为了解决这一问题,本文提出了一种具有负温度系数的读电压基准发生器来补偿阈值电压随温度的变化.本文所提出的具有负温度系数的电压电路通过分别调整负温度系数(complementary to absolute temperature,CTAT)电流和零温度系数(zero to absolute temperature,ZTAT)电流,可输出具有相同负温度系数的不同大小的读电压,并通过调制器(regulator)来提高其输出电压的范围.结果表明,所提出的方法可以提供一个可配置的读电压范围为1.5~4.5V.展开更多
NAND flash chips have been innovated from two-dimension （2D） design which is based on planar NAND cells to three-dimension （3D） design which is based on vertical NAND cells. Two types of NAND flash technologies-ch...NAND flash chips have been innovated from two-dimension （2D） design which is based on planar NAND cells to three-dimension （3D） design which is based on vertical NAND cells. Two types of NAND flash technologies-charge-trap （CT） and floating-gate （FG） are presented in this paper to introduce NAND flash designs in detail. The physical characteristics of CT-based and FG-based 3D NAND flashes are analyzed. Moreover, the advantages and disadvantages of these two technologies in architecture, manufacture, interference and reliability are studied and compared.展开更多
文摘For 3D vertical NAND flash memory, the charge pump output load is much larger than that of the planar NAND, resulting in the performance degradation of the conventional Dickson charge pump. Therefore, a novel all PMOS charge pump with high voltage boosting efficiency, large driving capability and high power efficiency for 3D V-NAND has been proposed. In this circuit, the Pellieoni structure is used to enhance the driving capability, two auxiliary substrate bias PMOS transistors are added to mitigate the body effect, and the degradation of the output voltage and boost efficiency caused by the threshold voltage drop is eliminated by dynamic gate control structure. Simulated results show that the proposed charge pump circuit can achieve the maximum boost efficiency of 86% and power efficiency of 50%. The output voltage of the proposed 9 stages charge pump can exceed 2 V under 2 MHz clock frequency in 2X nm 3D V-NAND technology. Our results provide guidance for the peripheral circuit design of high density 3D V-NAND integration.
文摘由于阈值电压(threshold voltage,VTH)的偏移,3DNAND闪存可靠性很容易受到温度变化的影响,这将进一步恶化读取裕度.为了解决这一问题,本文提出了一种具有负温度系数的读电压基准发生器来补偿阈值电压随温度的变化.本文所提出的具有负温度系数的电压电路通过分别调整负温度系数(complementary to absolute temperature,CTAT)电流和零温度系数(zero to absolute temperature,ZTAT)电流,可输出具有相同负温度系数的不同大小的读电压,并通过调制器(regulator)来提高其输出电压的范围.结果表明,所提出的方法可以提供一个可配置的读电压范围为1.5~4.5V.
文摘NAND flash chips have been innovated from two-dimension （2D） design which is based on planar NAND cells to three-dimension （3D） design which is based on vertical NAND cells. Two types of NAND flash technologies-charge-trap （CT） and floating-gate （FG） are presented in this paper to introduce NAND flash designs in detail. The physical characteristics of CT-based and FG-based 3D NAND flashes are analyzed. Moreover, the advantages and disadvantages of these two technologies in architecture, manufacture, interference and reliability are studied and compared.
