The interface properties of 4H-SiC metal oxide semiconductor （MOS） capacitors with post-oxidation annealing （POA） in nitric oxide （NO） ambient after high temperature （1300 ℃） oxidation have been investigated ...The interface properties of 4H-SiC metal oxide semiconductor （MOS） capacitors with post-oxidation annealing （POA） in nitric oxide （NO） ambient after high temperature （1300 ℃） oxidation have been investigated using capacitance-voltage （C V） measurements. The experimental results show that the interface states density （Dit） can be obviously decreased by the POA in NO ambient （NO-POA） and further reduced with increasing POA temperature and time. In the meantime significant reduction of the interface states density and oxidation time can be achieved at the higher thermal oxidation temperature, which results in the better oxide MOS characteristics and lower production costs. The dependence of Dit on POA temperature and time has been also discussed in detail.展开更多
Field plate(FP)-terminated 4H-SiC trench gate MOSFETs are demonstrated in this work.N+/P?/N?/N+multiple epitaxial layers were grown on 3-inch N+type 4H-SiC substrate by chemical vapor deposition(CVD),and then the 4H-S...Field plate(FP)-terminated 4H-SiC trench gate MOSFETs are demonstrated in this work.N+/P?/N?/N+multiple epitaxial layers were grown on 3-inch N+type 4H-SiC substrate by chemical vapor deposition(CVD),and then the 4H-SiC trench gate MOSFETs were fabricated based on the standard trench transistor fabrication.Current-voltage measurements in forward and reverse bias have been performed on different devices with and without FP protections.It is found that more than 60%of the devices protected with FP termination are able to block 850 V.The measurements also show that the devices have the small leakage currents 0.15 nA at 600 V and 2.5 nA at 800 V,respectively.The experimental results also were compared with the simulated results,which show good agreement with each other in the trend.The limited performance of the devices is mainly because of the damage induced on the trench sidewalls from the etching process and the quality of the SiO2 films.Therefore,the 4H-SiC trench gate MOSFETs are expected to be optimized by reducing the etching damage and growing high-quality SiO2 dielectric films.展开更多
基金Project supported by the National Natural Science Foundation of China(No.61234006)the State Grid of China(No.sgri-wd-71-14-003)
文摘The interface properties of 4H-SiC metal oxide semiconductor （MOS） capacitors with post-oxidation annealing （POA） in nitric oxide （NO） ambient after high temperature （1300 ℃） oxidation have been investigated using capacitance-voltage （C V） measurements. The experimental results show that the interface states density （Dit） can be obviously decreased by the POA in NO ambient （NO-POA） and further reduced with increasing POA temperature and time. In the meantime significant reduction of the interface states density and oxidation time can be achieved at the higher thermal oxidation temperature, which results in the better oxide MOS characteristics and lower production costs. The dependence of Dit on POA temperature and time has been also discussed in detail.
基金supported by the National Natural Science Foundation of China(Grant Nos.61176070,61274079)the Natural Science Foundation of Shaanxi Province(Grant No.2013JQ8012)+1 种基金the Doctoral Fund of Ministry of Education of China(Grant Nos.20110203110010,201302031-0017)the Key Specific Projects of Ministry of Education of China(Grant No.625010101)
文摘Field plate(FP)-terminated 4H-SiC trench gate MOSFETs are demonstrated in this work.N+/P?/N?/N+multiple epitaxial layers were grown on 3-inch N+type 4H-SiC substrate by chemical vapor deposition(CVD),and then the 4H-SiC trench gate MOSFETs were fabricated based on the standard trench transistor fabrication.Current-voltage measurements in forward and reverse bias have been performed on different devices with and without FP protections.It is found that more than 60%of the devices protected with FP termination are able to block 850 V.The measurements also show that the devices have the small leakage currents 0.15 nA at 600 V and 2.5 nA at 800 V,respectively.The experimental results also were compared with the simulated results,which show good agreement with each other in the trend.The limited performance of the devices is mainly because of the damage induced on the trench sidewalls from the etching process and the quality of the SiO2 films.Therefore,the 4H-SiC trench gate MOSFETs are expected to be optimized by reducing the etching damage and growing high-quality SiO2 dielectric films.
