Several fractionally spaced equalizers(FSE) which could be used in 60 GHz systems are presented in this paper. For 60 GHz systems, low-power equalization algorithms are favorable. We focus on FSE in both time domain(T...Several fractionally spaced equalizers(FSE) which could be used in 60 GHz systems are presented in this paper. For 60 GHz systems, low-power equalization algorithms are favorable. We focus on FSE in both time domain(TD) and frequency domain(FD) in order to meet different complexity requirements of 60 GHz systems. Compared with symbol spaced equalizer(SSE), FSE can relax the requirement of sampling synchronization hardware significantly. Extensive simulation results show that our equalization algorithms not only eliminate ISI efficiently, but are also robust to timing synchronization errors.展开更多
基金supported in part by the National High Technology Research and Development Program of China(863 Program)(No.2011AA010201)National Science and Technology Major Project(No.2013ZX03005010)+1 种基金the National Natural Science Foundation of China(NSFC)(No.61371103 and No.60902025)Key Science and Technology Program of Sichuan Province of China(No.2012FZ0119 and No.2012FZ0029)
文摘Several fractionally spaced equalizers(FSE) which could be used in 60 GHz systems are presented in this paper. For 60 GHz systems, low-power equalization algorithms are favorable. We focus on FSE in both time domain(TD) and frequency domain(FD) in order to meet different complexity requirements of 60 GHz systems. Compared with symbol spaced equalizer(SSE), FSE can relax the requirement of sampling synchronization hardware significantly. Extensive simulation results show that our equalization algorithms not only eliminate ISI efficiently, but are also robust to timing synchronization errors.
文摘功率放大器PA(Power Amplifier)是射频前端重要的模块,基于SMIC 55 nm RF CMOS工艺,设计了一款60 GHz两级差分功率放大器。针对毫米波频段下,硅基CMOS晶体管栅漏电容(C_(gd))严重影响放大器的增益和稳定性的问题,采用交叉耦合电容中和技术抵消C_(gd)影响。通过优化级间匹配网络和有源器件参数,提高了功率放大器的输出功率,增益和效率。后仿结果显示,在1.2 V的供电电压下,工作在60 GHz的功率放大器饱和输出功率为11.3 d Bm,功率增益为16.2 d B,功率附加效率为17.0%,功耗为62 m W。芯片面积380μm×570μm。
