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Design of IP core based on AMBA bus 被引量:1
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作者 JIA Boxiong LI Jinming 《Journal of Measurement Science and Instrumentation》 CAS CSCD 2022年第2期217-224,共8页
With the rapid development of integrated circuit(IC)technology,reusable intelligent property(IP)core design is widely valued by the industry.Based on the in-depth study of the functional characteristics of advanced mi... With the rapid development of integrated circuit(IC)technology,reusable intelligent property(IP)core design is widely valued by the industry.Based on the in-depth study of the functional characteristics of advanced microcontroller bus architecture(AMBA),a design scheme of IP core is presented,and it is divided into the functional modules,and the structural design of the IP core is completed.The relationship between the internal modules of the IP core is clarified,and the top-down design method is used to build the internal architecture of the IP core.The IP core interface module,register module,baud rate module,transmit module,receive module,and interrupt module are designed in detail by using Verilog language.The simulation results show that the designed IP core supports serial peripheral interface(SPI)protocol,the function coverage of IP core reaches 100%,the maximum working frequency reaches 200 MHz,and the resource occupancy rate is less than 15%.The reusable IP core can support multiple data formats,multiple timing transmission modes,and master/slave operation modes,reducing the resource consumption of hardware circuits and having stronger applicability. 展开更多
关键词 integrated circuit(IC) intelligent property(IP)core advanced microcontroller bus architecture(AMBA) serial peripheral interface(SPI)
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Design of shared bus DSP board in vector network analyzer
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作者 刘丹 王保锐 《Journal of Measurement Science and Instrumentation》 CAS 2013年第4期317-320,共4页
Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network anal... Currently,the mainstream vector network analyzer employs embedded computer module with a digital intermediate frequency(IF)board to form a high performance windows platform.Under this structure,the vector network analyzer needs a powerful encoding system to arbitrate the bus acquirement,which is usually realized by field-programmable gate array(FPGA)chip.The paper explores the shared bus design method of the digital signal processing(DSP)board in network analyzer.Firsty,it puts an emphasis on the system structure,and then the shared bus communication method is described in detail;Finally,the advantages of the shared bus communication mechanism are summanzed. 展开更多
关键词 shared bus host port interface(HPI) external memory interface(EMIF) field programmable gate array(FPGA) peripherical component interconnect(PCI)interface device
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The Design of Observatory Control System of LAMOST
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作者 王坚 金革 +3 位作者 虞孝麒 黄琨 李峰 任间 《Plasma Science and Technology》 SCIE EI CAS CSCD 2006年第3期347-351,共5页
This paper describes the system modelling, architecture design and implementation of the observatory control system (OCS) of the LAMOST (Large Area Multi-Object Fibre Spectroscopic Telescope). The software-reuse t... This paper describes the system modelling, architecture design and implementation of the observatory control system (OCS) of the LAMOST (Large Area Multi-Object Fibre Spectroscopic Telescope). The software-reuse technique, object-oriented technique, component and framework based software-developing methodology are used in the system architecture and implementation. The architecture of OCS is established based on a component-based layered system using many patterns such as the MVC (Model/View/Controller) and proxy. For the effective and safe exchange of commands and status between OCS and the subsystem, a unified message bus is defined and three protocols, namely a command acceptance/rejection protocol, a command execution feedback protocol and a status handling protocol, are proposed. The interface protocol between all the subsystems is defined. The full utilization of advanced computer technologies including the database, distributed computing, real-time computing, standard data exchange and expert system technologies has benefited the OCS software development. 展开更多
关键词 LAMOST observatory control architecture COMPONENTS interface subsystem protocols message bus
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Microstructures and mechanical properties of Cu/Al compound materials during thermal cycle 被引量:1
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作者 Bing Wang Ping Liu +4 位作者 Xin-Kuan Liu Zi-Yan Wang Yan-Yan Wang Xiao-Hong Chen Xiao-Zhi Liu 《Rare Metals》 SCIE EI CAS CSCD 2022年第11期3911-3918,共8页
Cu/Al compound materials,named as copperclad aluminum bus bars,are widely used in heat dissipation of modern engineering.The thermal cycle tests were conducted at 200,250 and 300℃for different cycle times,respectivel... Cu/Al compound materials,named as copperclad aluminum bus bars,are widely used in heat dissipation of modern engineering.The thermal cycle tests were conducted at 200,250 and 300℃for different cycle times,respectively.Effects of thermal cycle temperatures and thermal cycle times on micro structures and mechanical properties of the interface were studied.The results show that the width of bonding layer and bond strength are significantly affected by thermal cycle temperatures and times.Nonetheless,the variety or the quantity of intermediate compounds is scarcely influenced.Al_(2)Cu,Cu_(9) Al_(4)and CuAl were identified on the interface.With the increase in cycle times,grains of the material grew up.However,grains of the interface grew up more apparently than those of Cu and Al.The knowledge may be applied in the establishment of service condition and quality evaluation of material. 展开更多
关键词 Copper-clad aluminum bus bars Thermal cycle interface BONDING Microstructure INTERMETALLIC
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Towards a standardisation for digital inputs and outputs of protection functions in IEC 60255 series 被引量:1
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作者 Volker Leitloff Hao Chen +4 位作者 Dehui Chen Andrea Bonetti Lei Xu Ahmed Mohamed Carl Byman 《Protection and Control of Modern Power Systems》 2022年第1期382-392,共11页
Fully digitalized substations using IEC 61850 process bus are being introduced all over the world.Numerous utilities have featured pilot projects,demonstrators or even industrial scale deployment of these Fully Digita... Fully digitalized substations using IEC 61850 process bus are being introduced all over the world.Numerous utilities have featured pilot projects,demonstrators or even industrial scale deployment of these Fully Digital Protection,Auto-mation and Control Systems(FD-PACS).Product standards such as profiles for Instrument Transformers have been developed and published(IEC 61869-6 and IEC 61869-9 by TC 38-Instrument Transformers).This raises the question about the standards for digitally interfaced protection functions.In 2016,IEC TC 95(Measuring relays and protection equipment)charged a working group to investigate this subject and to elaborate recommendations concerning requirements and testing of protection IED with digital inputs and outputs for protection standards(IEC 60255-1xx series).For protection functions,publisher/subscriber based data streams are supposed to comply with IEC 61850 and IEC 61869 standards.This holds in particular for Sampled Values(SV)representing energising inputs of the protection function,and is also applicable to Generic Object Oriented Substation Event(GOOSE)which can be used for input or output of protection functions.Quality attributes of published data depend on the operational and connection status of the function and the hosting IED.In addition,protection functions have to take into account the information regarding the time synchronisation of the received SV and other parameters.This paper gives an overview of these features and the proposed way to take them into account in the IEC 60255 standard series.It describes the progress of WG 2 and relates it to existing standardization documents. 展开更多
关键词 Process bus Protection function Digital interface SAMU LPIT STANDARDS IEC 61850
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