This paper presented an automatic gain control （AGC） circuit suitable for FM/cw ladar. The proposed architecture was based on two-stage variable gain amplifier （VGA） chain with a novel DC offset canceller circuit,...This paper presented an automatic gain control （AGC） circuit suitable for FM/cw ladar. The proposed architecture was based on two-stage variable gain amplifier （VGA） chain with a novel DC offset canceller circuit, which contained an improved Gilbert cell and a Gm-C feedback loop. To keep the VGA with a linearity in dB characteristic, an improved exponential gain control circuit was introduced. The AGC was implemented in 0.18 gm standard CMOS process. Simulation and measurement results verified that its gain ranged from -20 dB to 30 dB, and band- width ranged from 100 kHz to 10 MHz. Its power consumption was 19.8 mW under a voltage supply of 3.3 V.展开更多
提出了一种新的数字自动增益控制(Automatic Gain Control,AGC)控制算法,这种算法弥补了AGC芯片控制范围和控制精度不满足工程要求的缺陷,解决了其他算法没有处理的问题。阐述了输入信号能量提取算法、输入信号的能量滤波算法以及控制...提出了一种新的数字自动增益控制(Automatic Gain Control,AGC)控制算法,这种算法弥补了AGC芯片控制范围和控制精度不满足工程要求的缺陷,解决了其他算法没有处理的问题。阐述了输入信号能量提取算法、输入信号的能量滤波算法以及控制范围和控制精度调整算法,给出了基于新算法的AGC控制过程框图,分析了输入信号能量提取算法的性能和原理,对能量滤波算法进行了仿真,并对控制范围和控制精度算法进行了设备测试和验证。展开更多
针对传统自动增益控制（automatic gain control,AGC）环路的调节时间随输入信号幅度减小而增长的缺点,改进传统AGC环路并进行对数域分析,推导其时间常数,提出一种固定时间常数、易于数字化硬件实现的方法,进行了AGC环路的Matlab仿真和...针对传统自动增益控制（automatic gain control,AGC）环路的调节时间随输入信号幅度减小而增长的缺点,改进传统AGC环路并进行对数域分析,推导其时间常数,提出一种固定时间常数、易于数字化硬件实现的方法,进行了AGC环路的Matlab仿真和包络检波、对数运算以及环路滤波模块的现场可编程门阵列（field programmable gate array,FPGA）实现。仿真和实现结果均表明：改进AGC的调节时间不受输入信号幅度的影响,能显著提高无线通信系统的频带利用率。展开更多
基金Supported by the National Science and Technology Major Project of the Ministry of Science and Technology of China(No.2012ZX03004008)
文摘This paper presented an automatic gain control （AGC） circuit suitable for FM/cw ladar. The proposed architecture was based on two-stage variable gain amplifier （VGA） chain with a novel DC offset canceller circuit, which contained an improved Gilbert cell and a Gm-C feedback loop. To keep the VGA with a linearity in dB characteristic, an improved exponential gain control circuit was introduced. The AGC was implemented in 0.18 gm standard CMOS process. Simulation and measurement results verified that its gain ranged from -20 dB to 30 dB, and band- width ranged from 100 kHz to 10 MHz. Its power consumption was 19.8 mW under a voltage supply of 3.3 V.
文摘提出了一种新的数字自动增益控制(Automatic Gain Control,AGC)控制算法,这种算法弥补了AGC芯片控制范围和控制精度不满足工程要求的缺陷,解决了其他算法没有处理的问题。阐述了输入信号能量提取算法、输入信号的能量滤波算法以及控制范围和控制精度调整算法,给出了基于新算法的AGC控制过程框图,分析了输入信号能量提取算法的性能和原理,对能量滤波算法进行了仿真,并对控制范围和控制精度算法进行了设备测试和验证。
