Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique wa...Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique was adopted to investigate integration with other complicated circuits.Using a unique XOR gate,the recommended circuit’s cell complexity has been decreased.The findings produced using the QCADesigner-2.0.3,a reliable simulation tool,prove the effectiveness of the current structure over earlier designs by considering the number of cells deployed,the area occupied,and the latency as design metrics.In addition,the popular tool QCAPro was used to estimate the energy dissipation of the proposed design.The proposed technique reduces the occupied space by∼40%,improves cell complexity by∼20%,and reduces energy dissipation by∼1.8 times(atγ=1.5EK)compared to the current scalable designs.This paper also studied the suggested structure’s energy dissipation and compared it to existing works for a better performance evaluation.展开更多
Decimal arithmetic circuits are promising to provide a solution for accurate decimal arithmetic operations which are not possible with binary arithmetic circuits.They can be used in banking,commercial and financial tr...Decimal arithmetic circuits are promising to provide a solution for accurate decimal arithmetic operations which are not possible with binary arithmetic circuits.They can be used in banking,commercial and financial transactions,scientific measurements,etc.This article presents the Very Large Scale Integration(VLSI)design of Binary Coded Decimal(BCD)-4221 area-optimized adder architecture using unconventional BCD-4221 representation.Unconventional BCD number representations such as BCD4221 also possess the additional advantage of more effectively representing the 10's complement representation which can be used to accelerate the decimal arithmetic operations.The design uses a binary Carry Lookahead Adder(CLA)along with some other logic blocks which are required to perform internal calculations with BCD-4221 numbers.The design is verified by using Xilinx Vivado 2016.1.Synthesis results have been obtained by Cadence Genus16.1 synthesis tool using 90 nm technology.The performance parameters such as area,power,delay,and area-delay Product(ADP)are compared with earlier reported circuits.Our proposed circuit shows significant area and ADP improvement over existing designs.展开更多
Reliable communication and intensive computing power cannot be provided effectively by temporary hot spots in disaster areas and complex terrain ground infrastructure.Mitigating this has greatly developed the applicat...Reliable communication and intensive computing power cannot be provided effectively by temporary hot spots in disaster areas and complex terrain ground infrastructure.Mitigating this has greatly developed the application and integration of UAV and Mobile Edge Computing(MEC)to the Internet of Things(loT).However,problems such as multi-user and huge data flow in large areas,which contradict the reality that a single UAV is constrained by limited computing power,still exist.Due to allowing UAV collaboration to accomplish complex tasks,cooperative task offloading between multiple UAVs must meet the interdependence of tasks and realize parallel processing,which reduces the computing power consumption and endurance pressure of terminals.Considering the computing requirements of the user terminal,delay constraint of a computing task,energy constraint,and safe distance of UAV,we constructed a UAV-Assisted cooperative offloading energy efficiency system for mobile edge computing to minimize user terminal energy consumption.However,the resulting optimization problem is originally nonconvex and thus,difficult to solve optimally.To tackle this problem,we developed an energy efficiency optimization algorithm using Block Coordinate Descent(BCD)that decomposes the problem into three convex subproblems.Furthermore,we jointly optimized the number of local computing tasks,number of computing offloaded tasks,trajectories of UAV,and offloading matching relationship between multi-UAVs and multiuser terminals.Simulation results show that the proposed approach is suitable for different channel conditions and significantly saves the user terminal energy consumption compared with other benchmark schemes.展开更多
BACKGROUND Juvenile systemic lupus erythematosus(SLE)is a severe,life-threatening disease.However,the role of rituximab in managing juvenile SLE remains undefined,although early biological intervention may improve dis...BACKGROUND Juvenile systemic lupus erythematosus(SLE)is a severe,life-threatening disease.However,the role of rituximab in managing juvenile SLE remains undefined,although early biological intervention may improve disease outcomes.AIM To assess the differences in the outcomes of different types of rituximab administration(early and late).METHODS In this retrospective cohort study,the information of 36 children with SLE with administration(LRA)was analyzed.We compared initial disease characteristics at onset,at baseline(start of rituximab),and at the end of the study(EOS)at 12 months,as well as outcomes and treatment characteristics.RESULTS The main differences at baseline were a higher daily median dose of corticosteroids,increased MAS frequency,and a higher Systemic Lupus Erythematosus Disease Activity Index(SLEDAI)in the ERA group.No differences in the main SLE outcomes between groups at the EOS were observed.The part of lupus nephritis patients who achieved remission changed from 44%to 31%in ERA and 32%to 11%in the LRA group.Patients with ERA had a shorter time to achieve low daily corticosteroid dose(≤0.2 mg/kg)at 1.2(0.9;1.4)years compared to 2.8(2.3;4.0)years(P=0.000001)and higher probability to achieve this low dose[hazard ratio(HR)=57.8(95%confidence interval(CI):7.2-463.2),P=0.00001 and remission(SLEDAI=0);HR=37.6(95%CI:4.45-333.3),P=0.00001].No differences in adverse events,including severe adverse events,were observed.CONCLUSION ERA demonstrated a better steroid-sparing effect and a possibility of earlier remission or low disease activity,except for lupus nephritis.Further investigations are required.展开更多
基于标准Bipolar-CMOS-DMOS(BCD)工艺研制的抗辐射电源管理芯片无法满足航天应用要求,抗辐射BCD工艺的发展严重制约了我国在航天领域核心器件的研制。与CMOS器件相比,LDMOS器件具有更高的工作电压和更多的介质结构,更易受到总剂量问题...基于标准Bipolar-CMOS-DMOS(BCD)工艺研制的抗辐射电源管理芯片无法满足航天应用要求,抗辐射BCD工艺的发展严重制约了我国在航天领域核心器件的研制。与CMOS器件相比,LDMOS器件具有更高的工作电压和更多的介质结构,更易受到总剂量问题的困扰。本文基于标准0.18μm BCD工艺,开展了18 V NLDMOS器件总剂量辐射效应研究,提出了一种总剂量辐射加固工艺技术。采用离子注入和材料改性技术工艺,提高了浅槽隔离场区边缘的P型硅反型阈值,从而增强了NLDMOS器件的抗辐射能力。通过对比实验表明,当辐照总剂量为100 krad(Si)时,加固的NLDMOS器件的抗辐射性能明显优于非加固的器件。通过总剂量辐射加固工艺技术的研究,可有效提高器件的抗总剂量辐射能力,避免设计加固造成芯片面积增大的问题。展开更多
提出了一种适用于环形栅LDMOS器件的子电路宏模型。基于对环形栅LDMOS器件结构的分析,将环形栅LDMOS器件分为两个部分,一个是中间的条形栅MOS部分,使用常规的高压MOS模型;另一个是端头部分,为一个圆环形栅极MOS器件,采用了一个单独的模...提出了一种适用于环形栅LDMOS器件的子电路宏模型。基于对环形栅LDMOS器件结构的分析,将环形栅LDMOS器件分为两个部分,一个是中间的条形栅MOS部分,使用常规的高压MOS模型;另一个是端头部分,为一个圆环形栅极MOS器件,采用了一个单独的模型。基于40 V BCD工艺的N沟道LDMOS器件进行模型提取与验证。结果表明,建立的宏模型具有较强的几何尺寸缩放功能,对于不同尺寸的器件都具有较高的拟合精度,并且模型能够兼容当前主要的商用电路仿真器Hspice和Spectre。展开更多
文摘针对超密集网络(ultra dense network,UDN)中基站密集部署导致的严重层间干扰问题,构建了考虑频谱复用和共信道干扰条件下最大化系统总吞吐量问题模型,提出了一种基于块坐标下降(block coordinate descent,BCD)法的联合频谱资源优化(joint resource optimization based on BCD,JROBB)方法。该方法将原问题分解为分簇、子信道分配和功率分配三个子问题,通过BCD法迭代优化子信道分配和功率分配,逼近原问题的最优解。仿真分析表明,在复杂度提升有限的情况下,系统总吞吐量比现有典型算法平均至少提升22%,可以有效提升频谱利用率。
文摘Code converters are essential in digital nano communication;therefore,a low-complexity optimal QCA layout for a BCD to Excess-3 code converter has been proposed in this paper.A QCA clockphase-based design technique was adopted to investigate integration with other complicated circuits.Using a unique XOR gate,the recommended circuit’s cell complexity has been decreased.The findings produced using the QCADesigner-2.0.3,a reliable simulation tool,prove the effectiveness of the current structure over earlier designs by considering the number of cells deployed,the area occupied,and the latency as design metrics.In addition,the popular tool QCAPro was used to estimate the energy dissipation of the proposed design.The proposed technique reduces the occupied space by∼40%,improves cell complexity by∼20%,and reduces energy dissipation by∼1.8 times(atγ=1.5EK)compared to the current scalable designs.This paper also studied the suggested structure’s energy dissipation and compared it to existing works for a better performance evaluation.
文摘Decimal arithmetic circuits are promising to provide a solution for accurate decimal arithmetic operations which are not possible with binary arithmetic circuits.They can be used in banking,commercial and financial transactions,scientific measurements,etc.This article presents the Very Large Scale Integration(VLSI)design of Binary Coded Decimal(BCD)-4221 area-optimized adder architecture using unconventional BCD-4221 representation.Unconventional BCD number representations such as BCD4221 also possess the additional advantage of more effectively representing the 10's complement representation which can be used to accelerate the decimal arithmetic operations.The design uses a binary Carry Lookahead Adder(CLA)along with some other logic blocks which are required to perform internal calculations with BCD-4221 numbers.The design is verified by using Xilinx Vivado 2016.1.Synthesis results have been obtained by Cadence Genus16.1 synthesis tool using 90 nm technology.The performance parameters such as area,power,delay,and area-delay Product(ADP)are compared with earlier reported circuits.Our proposed circuit shows significant area and ADP improvement over existing designs.
基金supported by the Jiangsu Provincial Key Research and Development Program(No.BE2020084-4)the National Natural Science Foundation of China(No.92067201)+2 种基金the National Natural Science Foundation of China(61871446)the Open Research Fund of Jiangsu Key Laboratory of Wireless Communications(710020017002)the Natural Science Foundation of Nanjing University of Posts and telecommunications(NY220047).
文摘Reliable communication and intensive computing power cannot be provided effectively by temporary hot spots in disaster areas and complex terrain ground infrastructure.Mitigating this has greatly developed the application and integration of UAV and Mobile Edge Computing(MEC)to the Internet of Things(loT).However,problems such as multi-user and huge data flow in large areas,which contradict the reality that a single UAV is constrained by limited computing power,still exist.Due to allowing UAV collaboration to accomplish complex tasks,cooperative task offloading between multiple UAVs must meet the interdependence of tasks and realize parallel processing,which reduces the computing power consumption and endurance pressure of terminals.Considering the computing requirements of the user terminal,delay constraint of a computing task,energy constraint,and safe distance of UAV,we constructed a UAV-Assisted cooperative offloading energy efficiency system for mobile edge computing to minimize user terminal energy consumption.However,the resulting optimization problem is originally nonconvex and thus,difficult to solve optimally.To tackle this problem,we developed an energy efficiency optimization algorithm using Block Coordinate Descent(BCD)that decomposes the problem into three convex subproblems.Furthermore,we jointly optimized the number of local computing tasks,number of computing offloaded tasks,trajectories of UAV,and offloading matching relationship between multi-UAVs and multiuser terminals.Simulation results show that the proposed approach is suitable for different channel conditions and significantly saves the user terminal energy consumption compared with other benchmark schemes.
基金Supported by Ministry of Science and Higher Education of the Russian Federation,No.075-15-2022-301the Russian Science Foundation Grant,No.22-45-08004.
文摘BACKGROUND Juvenile systemic lupus erythematosus(SLE)is a severe,life-threatening disease.However,the role of rituximab in managing juvenile SLE remains undefined,although early biological intervention may improve disease outcomes.AIM To assess the differences in the outcomes of different types of rituximab administration(early and late).METHODS In this retrospective cohort study,the information of 36 children with SLE with administration(LRA)was analyzed.We compared initial disease characteristics at onset,at baseline(start of rituximab),and at the end of the study(EOS)at 12 months,as well as outcomes and treatment characteristics.RESULTS The main differences at baseline were a higher daily median dose of corticosteroids,increased MAS frequency,and a higher Systemic Lupus Erythematosus Disease Activity Index(SLEDAI)in the ERA group.No differences in the main SLE outcomes between groups at the EOS were observed.The part of lupus nephritis patients who achieved remission changed from 44%to 31%in ERA and 32%to 11%in the LRA group.Patients with ERA had a shorter time to achieve low daily corticosteroid dose(≤0.2 mg/kg)at 1.2(0.9;1.4)years compared to 2.8(2.3;4.0)years(P=0.000001)and higher probability to achieve this low dose[hazard ratio(HR)=57.8(95%confidence interval(CI):7.2-463.2),P=0.00001 and remission(SLEDAI=0);HR=37.6(95%CI:4.45-333.3),P=0.00001].No differences in adverse events,including severe adverse events,were observed.CONCLUSION ERA demonstrated a better steroid-sparing effect and a possibility of earlier remission or low disease activity,except for lupus nephritis.Further investigations are required.
文摘基于标准Bipolar-CMOS-DMOS(BCD)工艺研制的抗辐射电源管理芯片无法满足航天应用要求,抗辐射BCD工艺的发展严重制约了我国在航天领域核心器件的研制。与CMOS器件相比,LDMOS器件具有更高的工作电压和更多的介质结构,更易受到总剂量问题的困扰。本文基于标准0.18μm BCD工艺,开展了18 V NLDMOS器件总剂量辐射效应研究,提出了一种总剂量辐射加固工艺技术。采用离子注入和材料改性技术工艺,提高了浅槽隔离场区边缘的P型硅反型阈值,从而增强了NLDMOS器件的抗辐射能力。通过对比实验表明,当辐照总剂量为100 krad(Si)时,加固的NLDMOS器件的抗辐射性能明显优于非加固的器件。通过总剂量辐射加固工艺技术的研究,可有效提高器件的抗总剂量辐射能力,避免设计加固造成芯片面积增大的问题。
文摘提出了一种适用于环形栅LDMOS器件的子电路宏模型。基于对环形栅LDMOS器件结构的分析,将环形栅LDMOS器件分为两个部分,一个是中间的条形栅MOS部分,使用常规的高压MOS模型;另一个是端头部分,为一个圆环形栅极MOS器件,采用了一个单独的模型。基于40 V BCD工艺的N沟道LDMOS器件进行模型提取与验证。结果表明,建立的宏模型具有较强的几何尺寸缩放功能,对于不同尺寸的器件都具有较高的拟合精度,并且模型能够兼容当前主要的商用电路仿真器Hspice和Spectre。
