Ex⁃situ Measurement of Internal Deformation in Ball Grid Array Package with Digital Volume Correlation

In spacecraft electronic devices,the deformation of solder balls within ball grid array(BGA)packages poses a significant risk of system failure.Therefore,accurately measuring the mechanical behavior of solder balls is crucial for ensuring the safety and reliability of spacecraft.Although finite element simulations have been extensively used to study solder ball deformation,there is a significant lack of experimental validation,particularly under thermal cycling conditions.This is due to the challenges in accurately measuring the internal deformations of solder balls and eliminating the rigid body displacement introduced during ex-situ thermal cycling tests.In this work,an ex-situ three-dimensional deformation measurement method using X-ray computed tomography(CT)and digital volume correlation(DVC)is proposed to overcome these obstacles.By incorporating the layer-wise reliability-guided displacement tracking(LW-RGDT)DVC with a singular value decomposition(SVD)method,this method enables accurate assessment of solder ball mechanical behavior in BGA packages without the influence of rigid body displacement.Experimental results reveal that BGA structures exhibit progressive convex deformation with increased thermal cycling,particularly in peripheral solder balls.This method provides a reliable and effective tool for assessing internal deformations in electronic packages under ex-situ conditions,which is crucial for their design optimization and lifespan predictions.

Study on solder joint reliability of ceramic ball grid array component based on design of experiment method

Four process parameters, pad diameter, stencil thickness, ball diameter and stand-off were chosen as four control factors. By using an L25 （5^6 ） orthogonal array the ceramic ball grid array （ CBGA ） solder joints which have 25 different combinations of process parameters were designed. The numerical models of all the 25 CBGA solder joints were developed using the Sugrace Evolver. Utilizing the sugrace coordinate exported from the 25 CBGA solder joints numerical models, the finite element analysis models were set up and the nonlinear finite element analysis of the CBGA solder joints under thermal cycles were pegrormed by ANSYS. The thermal fatigue life of CBGA solder joint was calculated using Coffin-Manson equation. Based on the calculated thermal fatigue life results, the range analysis and the variance analysis were pegrormed. The results show that the fatigue life of CBGA solder joint is affected by the pad diameter, the stencil thickness, the ball diameter and the stand-off in a descending order, the best combination of process parameters results in the longest fatigue life is 0.07 mm stand-off, 0.125 mm stencil thickness of, 0.85 mm ball diameter and 0. 89 mm pad diameter. With 95% confidence the pad diameter has a significant effect on the reliability of CBGA solder joints whereas the stand-off, the stencil thickness and the ball diameter have little effect on the reliability of CBGA solder joints.

Void defect detection in ball grid array X-ray images using a new blob filter

Ball grid arrays (BGAs) have been used in the production of electronic devices/assemblies because of their advantages of small size, high I/O port density, etc. However, BGA voids can degrade the performance of the board and cause failure. In this paper, a novel blob filter is proposed to automatically detect BGA voids presented in X-ray images. The proposed blob filter uses the local image gradient magnitude and thus is not influenced by image brightness, void position, or component interference. Different sized average box filters are employed to analyze the image in multi-scale, and as a result, the proposed blob filter is robust to void size. Experimental results show that the proposed method obtains void detection accuracy of up to 93.47% while maintaining a low false ratio. It outperforms another recent algorithm based on edge detection by 40.69% with respect to the average detection accuracy, and by 16.91% with respect to the average false ratio.

Void defect detection in BGA solder joints using mathematical morphology

Voids are one of the major defects in ball grid array （BGA） solder joints due to a large amount of outgassing flux that gets entrapped during reflow. X-ray nondestructive machines are used to make voids visible as lighter areas inside the solder joints in X-ray images for detection However, it has always been difficult to analyze this problem automatically because of some challenges such as noise, inconsistent lighting and void-like artifacts. This study realized accurate extraction and automatic a-nalysis of void defects in solder joints by adopting a technical proposal, in which Otsu algorithm was used to segment solder balls and void defects were extracted through opening and closing operations and top-hat transformation in mathematical mor-phology. Experimental results show that the technical proposal mentioned here has good robustness and can be applied in the detection of voids in BGA solder joints.

Thermo-mechanical fatigue reliability optimization of PBGA solder joints based on ANN-PSO

Based on a method combined artificial neural network (ANN) with particle swarm optimization (PSO) algorithm, the thermo-mechanical fatigue reliability of plastic ball grid array (PBGA) solder joints was studied. The simulation experiments of accelerated thermal cycling test were performed by ANSYS software. Based on orthogonal array experiments, a back-propagation artificial neural network (BPNN) was used to establish the nonlinear multivariate relationship between thermo-mechanical fatigue reliability and control factors. Then, PSO was applied to obtaining the optimal levels of control factors by using the output of BPNN as the affinity measure. The results show that the control factors, such as print circuit board (PCB) size, PCB thickness, substrate size, substrate thickness, PCB coefficient of thermal expansion (CTE), substrate CTE, silicon die CTE, and solder joint CTE, have a great influence on thermo-mechanical fatigue reliability of PBGA solder joints. The ratio of signal to noise of ANN-PSO method is 51.77 dB and its error is 33.3% less than that of Taguchi method. Moreover, the running time of ANN-PSO method is only 2% of that of the BPNN. These conclusions are verified by the confirmative experiments.

Plastic characterization and performance of SnAgCuBiNi/Cu lead-free BGA solder joints

Nanoindentation test is performed on study the plastic and creep properties of the Sn-Ag-Cu （SAC） lead-free ball grid array （ BGA ） solder joints. The dynamic hardness of two kinds of solder joints decreases with indentation depth increase. SACO705 BiNi/ Cu exhibits a higher ultimate dynamic hardness and a smaller indentation depth than SAC305/ Cu. Then the strain hardening phenomenon of SAC305/ Cu is more obvious compared to that of SACO705 BiNi/ Cu. The indentation creep of SACO705BiNi/ Cu solder joint is lower than that of SAC305/ Cu solder joint before and after thermal shock. The creep rate sensitive index of SACBiNi/Cu solder joint is lower than that of solder joint. SACO705BiNi/Cu solder joint is superior to SAC305/Cu solder joint in the anti-creep property. The plasticity of SACOTOSBiNi/Cu and SAC305/Cu solder joints are similar. Compared with SAC305 solder, the SACO705 BiNi solder pe^forms higher hardness and solder creep resistance and still maintains a good plasticity.

Development of a BGA Package Based on Si Interposer with Through Silicon Via

A ball grid array （BGA） package based on Si interposer with through silicon via （TSV） was de- signed. Thermal behaviors of the designed BGA with Si interposer has been analyzed and compared to a conventional BGA with BT substrate in the approach of finite element modeling （FEM）. The Si interposer with TSV was then fabricated and the designed BGA package was demonstrated. The designed BGA pack- age includes a 100 ~m thick Si interposer, which has redistribution copper traces on both sides. Through vias with 25 to 40 ~m diameter were fabricated on the Si interposer using deep reactive ion etching （DRIE）, plasma enhanced chemical vapor deposition （PECVD）, copper electroplating and chemical mechanical pol- ishing （CMP）, etc. TSV in the designed interposer is used as electrical interconnections and cooling chan- nels. 5 mm by 5 mm and 10 mm by 10 mm thermal chips were assembled on the Si interposer.