New Curvature-Compensated CMOS Bandgap Voltage Reference

A novel curvature-compensated CMOS bandgap voltage reference is presented. The reference utilizes two first order temperature compensations generated from the nonlinearity of the finite current gain β of vertical pnp bipolar transistor. The proposed circuit, designed in a standard 0.18 μm CMOS process, achieves a good temperature coefficient of 2.44 ppm/℃ with temperature range from --40℃ to 85 ℃, and about 4 mV supply voltage variation in the range from 1.4 V to 2.4 V. With a 1.8 V supply voltage, the power supply rejection ratio is -56dB at 10MHz.

A Piecewise-Linear Compensated Bandgap Reference

A bandgap voltage reference is presented with a piecewise linear compensating circuit in order to reduce the temperature coefficient.The basic principle is to divide the whole operating temperature range into some sub ranges.At different temperature sub ranges the bandgap reference can be compensated by different linear functions.Since the temperature sub range is much narrower than the whole range,the compensation error can be reduced significantly.Theoretically,the precision can be improved unlimitedly if the sub ranges are narrow enough.In the given example,with only three temperature sub ranges,the temperature coefficient of a conventional bandgap reference drops from 1 5×10 -5 /℃ to 2×10 -6 /℃ over the -40℃ to 120℃ temperature range.

Curvature Compensated CMOS Bandgap Reference with Novel Process Variation Calibration Technique

A lowtemperature coefficient（ TC） bandgap reference（ BGR） with novel process variation calibration technique is proposed in this paper. This proposed calibration technique compensating both TC and output value of BGR achieves fine adjustment step towards the reference voltage,while keeping optimal TC by utilizing large resistance to help layout match. The high-order curvature compensation realized by poly and p-diffusion resistors is introduced into the design to guarantee the temperature characteristic. Implemented in 180 nm technology,the proposed BGR has been simulated to have a power supply rejection ratio（ PSRR） of 91 dB@100 Hz. The calibration technique covers output voltage scope of 0. 49 V-0. 56 Vwith TC of 9. 45 × 10^（-6）/℃-9. 56 × 10^（-6）/℃ over the temperature range of-40 ℃-120 ℃. The designed BGR provides a reference voltage of 500 mV,with measured TC of 10. 1 × 10^（-6）/℃.

IC Implementation of a Programmable CMOS Voltage Reference

A new approach for the design and implementation of a programmable voltage reference based on an improved current mode bandgap voltage reference is presented. The circuit is simulated and fabricated with Chartered 0. 35μm mixed-signal technology. Measurements demonstrate that the temperature coefficient is ± 36. 3ppm/℃ from 0 to 100℃ when the VID inputs are 11110.As the supply voltage is varied from 2.7 to 5V, the voltage reference varies by about 5mV. The maximum glitch of the transient response is about 20mV at 125kHz. Depending on the state of the five VID inputs,an output voltage between 1.1 and 1.85V is programmed in increments of 25mV.

A Super Performance Bandgap Voltage Reference with Adjustable Output for DC-DC Converter

This paper presents a super performance bandgap voltage reference for DC-DC converter with adjustable output. it generates a wide range of voltage reference ranging from sub- 1V to 1,221 7 V and has a low temperature coefficient of 2.3 × 10 ^5/K over the temperature variation using the current feedback and resistive subdivision. In addition, the power supply rejection ration of the proposed bandgap voltage reference is 78 dB. When supply voltage varies from 2.5 V to 6 V, output VREF is 1,221 685±0.055 mV.

Negative voltage bandgap reference with multilevel curvature compensation technique

A novel high-order curvature compensation negative voltage bandgap reference （NBGR） based on a novel multilevel compensation technique is introduced. Employing an exponential curvature compensation （ECC） term with many high order terms in itself, in a lower temperature range （TR） and a multilevel curvature compen- sation （MLCC） term in a higher TR, a flattened and better effect of curvature compensation over the TR of 165℃ （--40 to 125 ℃） is realised. The MLCC circuit adds two convex curves by using two sub-threshold operated NMOS. The proposed NBGR implemented in the Central Semiconductor Manufacturing Corporation （CSMC） 0.5 #m BCD technology demonstrates an accurate voltage of-1.183 V with a temperature coefficient （TC） as low as 2.45 ppm/℃over the TR of 165℃ at a -5.0 V power supply; the line regulation is 3 mV/V from a -5 to -2 V supply voltage. The active area of the presented NBGR is 370×180 μm2.

Novel high-PSRR high-order curvature-compensated bandgap voltage reference

This paper proposes a novel high-power supply rejection ratio（high-PSRR） high-order curvature-compensated CMOS bandgap voltage reference（BGR） in SMIC 0.18 μm CMOS process. Three kinds of current are added to a conventional BGR in order to improve the temperature drift within wider temperature range, which include a piecewise-curvaturecorrected current in high temperature range, a piecewise-curvature-corrected current in low temperature range and a proportional-to-absolute-temperature T^（1.5） current. The high-PSRR characteristic of the proposed BGR is achieved by adopting the technique of pre-regulator. Simulation results shows that the temperature coefficient of the proposed BGR with pre-regulator is 8.42x10^（-6）′ /℃ from - 55 ℃ to 125 ℃ with a 1.8 V power supply voltage. The proposed BGR with pre-regulator achieves PSRR of - 123.51 dB, - 123.52 dB, - 88.5 dB and - 50.23 dB at 1 Hz, 100 Hz, 100 kHz and 1 MHz respectively.

A high precision high PSRR bandgap reference with thermal hysteresis protection

To meet the accuracy requirement for the bandgap voltage reference by the increasing data conversion precision of integrated circuits,a high-order curvature-compensated bandgap voltage reference is presented employing the characteristic of bipolar transistor current gain exponentially changing with temperature variations.In addition,an over-temperature protection circuit with a thermal hysteresis function to prevent thermal oscillation is proposed.Based on the CSMC 0.5μm 20 V BCD process,the designed circuit is implemented;the active die area is 0.17×0.20 mm;. Simulation and testing results show that the temperature coefficient is 13.7 ppm/K with temperature ranging from -40 to 150℃,the power supply rejection ratio is -98.2 dB,the line regulation is 0.3 mV/V,and the power consumption is only 0.38 mW.The proposed bandgap voltage reference has good characteristics such as small area,low power consumption, good temperature stability,high power supply rejection ratio,as well as low line regulation.This circuit can effectively prevent thermal oscillation and is suitable for on-chip voltage reference in high precision analog,digital and mixed systems.

A 1.2-V 19.2-mW 10-bit 30-MS/s pipelined ADC in 0.13-μm CMOS

A 10-bit 30-MS/s pipelined analog-to-digital converter（ADC） is presented.For the sake of lower power and area,the pipelined stages are scaled in current and area,and op amps are shared between the successive stages. The ADC is realized in the 0.13-μm 1-poly 8-copper mixed signal CMOS process operating at 1.2-V supply voltage. Design approaches are discussed to overcome the challenges associated with this choice of process and supply voltage, such as limited dynamic range,poor analog characteristic devices,the limited linearity of analog switches and the embedded sub-1-V bandgap voltage reference.Measured results show that the ADC achieves 55.1-dB signal-to-noise and distortion ratio,67.5-dB spurious free dynamic range and 19.2-mW power under conditions of 30 MSPS and 10.7- MHz input signal.The FoM is 0.33 pJ/step.The peak integral and differential nonlinearities are 1.13 LSB and 0.77 LSB,respectively.The ADC core area is 0.94 mm^2.