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Design of a high-performance PJFET for the input stage of an integrated operational amplifier
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作者 税国华 唐昭焕 +4 位作者 王志宽 欧红旗 杨永晖 刘勇 王学毅 《Journal of Semiconductors》 EI CAS CSCD 北大核心 2010年第1期34-38,共5页
With Shockley's approximate-channel theory and TCAD tools, a high-voltage, ultra-shallow junction PJFET for the input stage of an integrated operational amplifier (OPA) was realized. The high-performance PJFET devi... With Shockley's approximate-channel theory and TCAD tools, a high-voltage, ultra-shallow junction PJFET for the input stage of an integrated operational amplifier (OPA) was realized. The high-performance PJFET device was developed in the Bi-FET process technology. The measured specifications are as follows. The top-gate junction depth is about 0.1 μm, the gate-leakage current is less than 5 pA, the breakdown voltage is more than 80 V, and the pinch-off voltage is optional between 0.8 and 2.0 V. The device and its Bi-FET process technology were used to design and process a high input-impedance integrated OPA. The measured results show that the OPA has a bias current of less than 50 pA, voltage noise of less than 50 nV/Hz^1/2, and current noise of less than 0.05 pA/Hz^1/2. 展开更多
关键词 PJFET operational amplifier bi-fet process ultra-shallow junction high input-impedance
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