With the complexity of integrated circuits is continually increasing, a local defect in circuits may cause multiple faults. The behavior of a digital circuit with a multiple fault may significantly differ from that of...With the complexity of integrated circuits is continually increasing, a local defect in circuits may cause multiple faults. The behavior of a digital circuit with a multiple fault may significantly differ from that of a single fault. A new method for the detection of multiple faults in digital circuits is presented in this paper, the method is based on binary decision diagram （BDD）. First of all, the BDDs for the normal circuit and faulty circuit are built respectively. Secondly, a test BDD is obtained by the XOR operation of the BDDs corresponds to normal circuit and faulty circuit. In the test BDD, each input assignment that leads to the leaf node labeled 1 is a test vector of multiple faults. Therefore, the test set of multiple faults is generated by searching for the type of input assignments in the test BDD. Experimental results on some digital circuits show the feasibility of the approach presented in this paper.展开更多
The binary decision diagrams （BDDs） can give canonical representation to Boolean functions; they have wide applications in the design and verification of digital systems. A new method based on cultural algorithms fo...The binary decision diagrams （BDDs） can give canonical representation to Boolean functions; they have wide applications in the design and verification of digital systems. A new method based on cultural algorithms for minimizing the size of BDDs is presented in this paper. First of all, the coding of an individual representing a BDDs is given, and the fitness of an individual is defined. The population is built by a set of the individuals. Second, the implementations based on cultural algorithms for the minimization of BDDs, i.e., the designs of belief space and population space, and the designs of acceptance function and influence function, are given in detail. Third, the fault detection approaches using BDDs for digital circuits are studied. A new method for the detection of crosstalk faults by using BDDs is presented. Experimental results on a number of digital circuits show that the BDDs with small number of nodes can be obtained by the method proposed in this paper, and all test vectors of a fault in digital circuits can also be produced.展开更多
Fault tree analysis(FTA),as a structurally simple,visualized and scientific method,is widely used in various fields.To complete the FTA of the launching device,the binary decision diagram(BDD)method is used to obtain ...Fault tree analysis(FTA),as a structurally simple,visualized and scientific method,is widely used in various fields.To complete the FTA of the launching device,the binary decision diagram(BDD)method is used to obtain the non-intersect cut sets,the minimum cut sets and the probability importance of components.Then,the expert evaluation method is applied to solving fuzzy probability rate of bottom event with zero failure data.In this paper,the BDD and expert evaluation method are applied into FTA to analyze a launch device.展开更多
基金Supported by the National Natural Science Foun-dation of China (60006002) Natural Science Research Project of Education Department of Guangdong Province of China (02019)
文摘With the complexity of integrated circuits is continually increasing, a local defect in circuits may cause multiple faults. The behavior of a digital circuit with a multiple fault may significantly differ from that of a single fault. A new method for the detection of multiple faults in digital circuits is presented in this paper, the method is based on binary decision diagram （BDD）. First of all, the BDDs for the normal circuit and faulty circuit are built respectively. Secondly, a test BDD is obtained by the XOR operation of the BDDs corresponds to normal circuit and faulty circuit. In the test BDD, each input assignment that leads to the leaf node labeled 1 is a test vector of multiple faults. Therefore, the test set of multiple faults is generated by searching for the type of input assignments in the test BDD. Experimental results on some digital circuits show the feasibility of the approach presented in this paper.
基金supported by Natural Science Foundation of Guangdong Provincial of China (No.7005833)
文摘The binary decision diagrams （BDDs） can give canonical representation to Boolean functions; they have wide applications in the design and verification of digital systems. A new method based on cultural algorithms for minimizing the size of BDDs is presented in this paper. First of all, the coding of an individual representing a BDDs is given, and the fitness of an individual is defined. The population is built by a set of the individuals. Second, the implementations based on cultural algorithms for the minimization of BDDs, i.e., the designs of belief space and population space, and the designs of acceptance function and influence function, are given in detail. Third, the fault detection approaches using BDDs for digital circuits are studied. A new method for the detection of crosstalk faults by using BDDs is presented. Experimental results on a number of digital circuits show that the BDDs with small number of nodes can be obtained by the method proposed in this paper, and all test vectors of a fault in digital circuits can also be produced.
文摘Fault tree analysis(FTA),as a structurally simple,visualized and scientific method,is widely used in various fields.To complete the FTA of the launching device,the binary decision diagram(BDD)method is used to obtain the non-intersect cut sets,the minimum cut sets and the probability importance of components.Then,the expert evaluation method is applied to solving fuzzy probability rate of bottom event with zero failure data.In this paper,the BDD and expert evaluation method are applied into FTA to analyze a launch device.
