A limiting amplifier (LA) IC implemented in TSMC standard 0.25μm CMOS technology is described.Active inductor loads and direct-coupled technology are employed to increase the gain,broaden the bandwidth,reduce the pow...A limiting amplifier (LA) IC implemented in TSMC standard 0.25μm CMOS technology is described.Active inductor loads and direct-coupled technology are employed to increase the gain,broaden the bandwidth,reduce the power dissipation,and keep a tolerable noise performance.Under a 3.3V supply voltage,the LA core achieves a gain of 50-dB with a power consumption below 40mW.The measured input sensitivity of the amplifier is better than 5m V _ pp .It can operate at bit rates up to 7Gb/s with an rms jitter of 0.03 UI or less.The chip area is only 0.70mm×0.70mm.According to the measurement results,this IC is expected to work at the standard bit rate levels of 2.5,3.125,and 5Gb/s.展开更多
A fully integrated 40 Gbit/s optical receiver analog front-end （AFE） including a transimpedance amplifier （TIA） and a limiting amplifier （LA） for short distance communication is described in this paper. The prop...A fully integrated 40 Gbit/s optical receiver analog front-end （AFE） including a transimpedance amplifier （TIA） and a limiting amplifier （LA） for short distance communication is described in this paper. The proposed TIA employs a modified regulated cascode （RGC） configuration as input stage, and adopts a third order interleaving active feedback gain stage. The LA utilizes nested active feedback, negative capacitance, and inductor peaking technology to achieve high voltage gain and wide bandwidth. The tiny photo current received by the receiver AFE is amplified to a single-ended voltage swing of 200 mV（p-p）. Simulation results show that the receiver AFE provides conversion gain of up to 83 dBΩ and bandwidth of 34.7 GHz, and the equivalent input noise current integrated from 1 MHz to 30 GHz is about 6.6 μA（rms）.展开更多
设计了一种的低成本、低功耗的10 Gb/s光接收机全差跨阻前置放大电路。该电路由跨阻放大器、限幅放大器和输出缓冲电路组成,其可将微弱的光电流信号转换为摆幅为400 m Vpp的差分电压信号。该全差分前置放大电路采用0.18μm CMOS工艺进...设计了一种的低成本、低功耗的10 Gb/s光接收机全差跨阻前置放大电路。该电路由跨阻放大器、限幅放大器和输出缓冲电路组成,其可将微弱的光电流信号转换为摆幅为400 m Vpp的差分电压信号。该全差分前置放大电路采用0.18μm CMOS工艺进行设计,当光电二极管电容为250 f F时,该光接收机前置放大电路的跨阻增益为92 d BΩ,-3 d B带宽为7.9 GHz,平均等效输入噪声电流谱密度约为23 p A/(0~8 GHz)。该电路采用电源电压为1.8 V时,跨阻放大器功耗为28 m W,限幅放大器功耗为80 m W,输出缓冲器功耗为40 m W,其芯片面积为800μm×1 700μm。展开更多
研究了光电探测器(PD)的结构、性能以及后续放大电路,实现了塑料光纤通信的高速单片集成光接收芯片。首先,根据工艺流程和参数,采用器件模拟软件对PD结构进行了建模,并对其光谱响应度和结电容进行了理论推导及仿真。基于Cadence/spectr...研究了光电探测器(PD)的结构、性能以及后续放大电路,实现了塑料光纤通信的高速单片集成光接收芯片。首先,根据工艺流程和参数,采用器件模拟软件对PD结构进行了建模,并对其光谱响应度和结电容进行了理论推导及仿真。基于Cadence/spectre软件和仿真得到的PD参数对由跨阻放大器、限幅放大器和输出缓冲电路组成的后续放大电路进行了协同设计。采用0.5μm BCD(Bipolar,CMOS and DMOS)工艺对单个PD以及PD和后续放大电路单片集成电路进行了流片、封装和测试。结果表明:PD的光谱响应曲线的峰值波长和仿真结果较一致,约为700nm,PD结构更适合短波长探测;PD的结电容随着反向电压的增大而减小,结电容越大,光接收芯片的带宽越小;对于650nm的入射光,在小于10-9的误码率条件下,光接收机的灵敏度为-14dBm;最后得到了150Mb/s速率的清晰眼图。实验结果显示,设计的高速单片集成光接收机可以应用于百兆速率光纤入户通信系统。展开更多
文摘A limiting amplifier (LA) IC implemented in TSMC standard 0.25μm CMOS technology is described.Active inductor loads and direct-coupled technology are employed to increase the gain,broaden the bandwidth,reduce the power dissipation,and keep a tolerable noise performance.Under a 3.3V supply voltage,the LA core achieves a gain of 50-dB with a power consumption below 40mW.The measured input sensitivity of the amplifier is better than 5m V _ pp .It can operate at bit rates up to 7Gb/s with an rms jitter of 0.03 UI or less.The chip area is only 0.70mm×0.70mm.According to the measurement results,this IC is expected to work at the standard bit rate levels of 2.5,3.125,and 5Gb/s.
基金supported by the National Natural Science Foundation of China (60976029)
文摘A fully integrated 40 Gbit/s optical receiver analog front-end （AFE） including a transimpedance amplifier （TIA） and a limiting amplifier （LA） for short distance communication is described in this paper. The proposed TIA employs a modified regulated cascode （RGC） configuration as input stage, and adopts a third order interleaving active feedback gain stage. The LA utilizes nested active feedback, negative capacitance, and inductor peaking technology to achieve high voltage gain and wide bandwidth. The tiny photo current received by the receiver AFE is amplified to a single-ended voltage swing of 200 mV（p-p）. Simulation results show that the receiver AFE provides conversion gain of up to 83 dBΩ and bandwidth of 34.7 GHz, and the equivalent input noise current integrated from 1 MHz to 30 GHz is about 6.6 μA（rms）.
文摘设计了一种的低成本、低功耗的10 Gb/s光接收机全差跨阻前置放大电路。该电路由跨阻放大器、限幅放大器和输出缓冲电路组成,其可将微弱的光电流信号转换为摆幅为400 m Vpp的差分电压信号。该全差分前置放大电路采用0.18μm CMOS工艺进行设计,当光电二极管电容为250 f F时,该光接收机前置放大电路的跨阻增益为92 d BΩ,-3 d B带宽为7.9 GHz,平均等效输入噪声电流谱密度约为23 p A/(0~8 GHz)。该电路采用电源电压为1.8 V时,跨阻放大器功耗为28 m W,限幅放大器功耗为80 m W,输出缓冲器功耗为40 m W,其芯片面积为800μm×1 700μm。
文摘研究了光电探测器(PD)的结构、性能以及后续放大电路,实现了塑料光纤通信的高速单片集成光接收芯片。首先,根据工艺流程和参数,采用器件模拟软件对PD结构进行了建模,并对其光谱响应度和结电容进行了理论推导及仿真。基于Cadence/spectre软件和仿真得到的PD参数对由跨阻放大器、限幅放大器和输出缓冲电路组成的后续放大电路进行了协同设计。采用0.5μm BCD(Bipolar,CMOS and DMOS)工艺对单个PD以及PD和后续放大电路单片集成电路进行了流片、封装和测试。结果表明:PD的光谱响应曲线的峰值波长和仿真结果较一致,约为700nm,PD结构更适合短波长探测;PD的结电容随着反向电压的增大而减小,结电容越大,光接收芯片的带宽越小;对于650nm的入射光,在小于10-9的误码率条件下,光接收机的灵敏度为-14dBm;最后得到了150Mb/s速率的清晰眼图。实验结果显示,设计的高速单片集成光接收机可以应用于百兆速率光纤入户通信系统。
