Comparison of radiation degradation induced by x-ray and 3-MeV protons in 65-nm CMOS transistors

The total ionizing dose（TID） response of 65-nm CMOS transistors is studied by 10-ke V x-ray and 3-Me V protons up to 1 Grad（SiO_2） total dose.The degradation levels induced by the two radiation sources are different to some extent.The main reason is the interface dose enhancement due to the thin gate oxide and the low energy photons.The holes＇ recombination also contributes to the difference.Compared to these two mechanisms,the influence of the dose rate is negligible.

A CMOS high-IF down-conversion mixer for WLAN 802.11a applications

A low noise, high conversion gain down-conversion mixer for WLAN 802.11a applications, which adopts the high intermediate frequency （IF） topology, is presented. The input radio frequency （RF）band, local oscillator（LO）frequency band and output IF are 5.15 to 5.35, 4.15 to 4.35 and 1 GHz, respectively. Source resistive degeneration technique and pseudo-differential Gilbert topology are used to achieve high linearity, and, current bleeding technique and LC resonant loads are used to acquire a low noise figure. In addition, the mixer adopts a common-source transistor pair cross-stacked with a source follow pair（CSSF）circuit as an output buffer to enhance the mixer＇s conversion gain but not deteriorate the other performances. The mixer is implemented in 0.18 μm RF CMOS（complementary metal oxide semiconductor transistor）technology and the chip area of the mixer including all bonding pads is 580 μm×1 185 μm. The measured results show that under a 1.8 V supply, the conversion gain is 10.1 dB; the input 1 dB compression point and the input-referred third-order intercept point are-3.5 and 5.3 dBm, respectively; the single side band （SSB）noise figure （NF）is 8.65 dB, and the core current consumption is 3.8 mA.

Design of CMOS class-E power amplifier for low power applications

A fully integrated class-E power amplifier（PA） at 2.4 GHz implemented in a 0. 18 μm 6-metal-layer mixed/RF CMOS （ complementary metal-oxide-semiconductor transistor ） technology is presented. A two-stage amplification structure is chosen for this PA. The driving stage produces a high swing switch signal by using resonation technology. The output stage is designed as a class-E topology to realize the power amplification. Under a 1.2 V power supply, the PA delivers a maximum output power of 8. 8 dBm with a power-added efficiency （PAE） of 44%. A new power control method for the class-E power amplifier is described. By changing the amplitude and duty cycle of the signal which enters the class-E switch transistor, the output power can be covered from - 3 to 8. 8 dBm through a three-bit control word. The proposed PA can be used in low power applications, such as wireless sensor networks and biotelemetry systems.

Neuronal signal detecting and stimulating circuit array for monolithic integrated MEA

A neuronal signal detecting circuit and a neuronal signal stimulating circuit designed for a monolithic integrated MEA（micro-electrode array） system are described. As a basic cell of the circuits, an OPA（ operational amplifier） is designed with low power, low noise, small size and high gain. The detecting circuit has a chip area of 290 μm × 400 μm, a power dissipation of 2.02 mW, an equivalent input noise of 17.72 nV/ Hz, a gain of 60. 5 dB, and an output voltage from - 2. 48 to ＋ 2. 5 V. The stimulating circuit has a chip area of 130 μm × 290 μm, a power dissipation of 740 μW, and an output voltage from - 2. 5 to 2. 04 V. The parameters show that two circuits are suitable for a monolithic integrated MEA system. The detecting circuit and MEA have been fabricated. The test results show that the detecting circuit works well.

A novel wide-dynamic-range logarithmic-response bipolar junction photogate transistor for CMOS imagers

In this paper, a new photodetector, bipolar junction photogate transistor (BJPG), is proposed for CMOS imagers. Due to an injection p+n junction introduced, the photo-charges drift through the p+n junction by the applied electronic field, and on the other hand, the p+n junction injects the carriers into the channel to carry the photo-charges. Therefore this device can increase the readout rate of the pixel signal charges and the photoelectron transferring efficiency. Using this new device, a new type of logarithmic pixel circuit is obtained with a wide dynamic range which makes photo-detector more suitable for imaging the naturally illuminated scenes. The simulations show that the photo current density of BJPG increases logarithmically with the incident light power due to the introduced injection p+n junction. The noise characteristics of BJPG are analyzed in detail and a new gate-induced noise is proposed. Based on the established numerical analytical model of noise, the power spectrum density curves are simulated.

Wide Symmetrical Dynamic Range PWM Neuron Circuit with Power Efficient Architecture

A novel pulse stream neuron circuit is presented whose output pulse width facilitates sigmoid activation to activate the function of neurons. The wide symmetrical dynamic range of this neuron ensures high noise immunity. The pulsed activation strategy provides a power efficient architecture, so the circuit has very low power dissipation. The simplicity of the circuit ensures its suitability for large-scale integration.