Principle, Modeling and Control of DC-DC Convertors for EV

DC DC convertors can convert the EV's high voltage DC power supply into the low voltage DC power supply. In order to design an excellent convertor one must be guided by theory of automatic control. The principle and the method of design, modeling and control for DC DC convertors of EV are introduced. The method of the system response to a unit step function input and the frequency response method are applied to researching the convertor's mathematics model and control characteristic. Experiments show that the designed DC DC convertor's output voltage precision is high, the antijamming ability is strong and the adjustable performance is fast and smooth.

HYDRODYNAMIC ANALYSIS AND DESIGN METHOD OF OWC WAVE ENERGY CONVERTORS

In this paper,using potential flow theory and assuming that the pressure in the air cabin is proportional to the vertical velocity of the water column,we establish a hydrodynamic model for OWC wave energy convertors,resulting in a collection of illustrative plates,from which the behaviour of an OWC and the relation between its parameters are discussed. Optimization theory is used to design an optimum convertor working in irregular waves. It is found that the numerical results fit well the experimental data.

Machine Learning Controller for DFIG Based Wind Conversion System

Renewable energy production plays a major role in satisfying electricity demand.Wind power conversion is one of the most popular renewable energy sources compared to other sources.Wind energy conversion has two major types of generators such as the Permanent Magnet Synchronous Generator(PMSG)and the Doubly Fed Induction Generator(DFIG).The maximum power tracking algo-rithm is a crucial controller,a wind energy conversion system for generating maximum power in different wind speed conditions.In this article,the DFIG wind energy conversion system was developed in Matrix Laboratory(MATLAB)and designed a machine learning(ML)algorithm for the rotor and grid side converter.The ML algorithm has been developed and trained in a MATLAB environment.There are two types of learning algorithms such as supervised and unsupervised learning.In this research supervised learning is used to power the neural networks and analysis is made for various hidden layers and activation functions.Simulation results are assessed to demonstrate the efficiency of the proposed system.

Geometrical Evaluation on the Viscous Effect of Point-Absorber Wave-Energy Converters

The fluid viscosity is known to have a significant effect on the hydrodynamic characteristics which are linked to the power conversion ability of the wave energy converter(WEC). To overcome the disadvantages of case-by-case study through the experiments and numerical computations employed by the former researches, the viscous effect is studied comprehensively for multiple geometries in the present paper. The viscous effect is expressed as the viscous added mass and damping solved by the free-decay method. The computational fluid dynamics(CFD) method is employed for the calculation of the motion and flow field around the floater. The diameter to draft ratio and bottom shape are considered for the geometrical evaluation on the viscous effect. The results show that a slenderer floater presents a stronger viscous effect. Through the comparisons of the floaters with four different bottom shapes, the conical bottom is recommended in terms of low viscous effect and simple geometry for manufacture. A viscous correction formula for a series of cylindrical floaters is put forward, for the first time, to help the engineering design of outer-floaters of point-absorber WECs.

Multi-narrowband signals receiving method based on analog-to-information convertor and block sparsity

The analog-to-information convertor (AIC) is a successful practice of compressive sensing (CS) theory in the analog signal acquisition. This paper presents a multi-narrowband signals sampling and reconstruction model based on AIC and block sparsity. To overcome the practical problems, the block sparsity is divided into uniform block and non-uniform block situations, and the block restricted isometry property and sub-sampling limit in different situations are analyzed respectively in detail. Theoretical analysis proves that using the block sparsity in AIC can reduce the restricted isometric constant, increase the reconstruction probability and reduce the sub -sampling rate. Simulation results show that the proposed model can complete sub -sampling and reconstruction for multi-narrowband signals. This paper extends the application range of AIC from the finite information rate signal to the multi-narrowband signals by using the potential relevance of support sets. The proposed receiving model has low complexity and is easy to implement, which can promote the application of CS theory in the radar receiver to reduce the burden of analog-to digital convertor (ADC) and solve bandwidth limitations of ADC.

Mode filtering based on ponderomotive force nonlinearity in a plasma filled rectangular waveguide

Here a new scheme for mode filtering is proposed. Based on the ponderomotive force effect,propagation of the microwave dual-mode through a plasma-filled metallic rectangular waveguide is investigated. To excite the TE_（20） mode in a rectangular waveguide, the existence of fundamental modes is unavoidable. To filter the destructive mode（TE_（10））, the waveguide is filled with a collisional plasma. Based on the coupling effect, the energy of this destructive TE_（10） mode is transferred to the TE_（20） mode. The proposed structure acts like a mode convertor. The TE_（10） mode become more attenuated and instead the TE_（20） mode is amplified. The plasma filled rectangular waveguide acts as a mode filtering tool.

Adaptive block greedy algorithms for receiving multi-narrowband signal in compressive sensing radar reconnaissance receiver

This paper extends the application of compressive sensing(CS) to the radar reconnaissance receiver for receiving the multi-narrowband signal. By combining the concept of the block sparsity, the self-adaption methods, the binary tree search,and the residual monitoring mechanism, two adaptive block greedy algorithms are proposed to achieve a high probability adaptive reconstruction. The use of the block sparsity can greatly improve the efficiency of the support selection and reduce the lower boundary of the sub-sampling rate. Furthermore, the addition of binary tree search and monitoring mechanism with two different supports self-adaption methods overcome the instability caused by the fixed block length while optimizing the recovery of the unknown signal.The simulations and analysis of the adaptive reconstruction ability and theoretical computational complexity are given. Also, we verify the feasibility and effectiveness of the two algorithms by the experiments of receiving multi-narrowband signals on an analogto-information converter(AIC). Finally, an optimum reconstruction characteristic of two algorithms is found to facilitate efficient reception in practical applications.

A 1-GHz, 7-mW, 8-Bit Subranging ADC without Resistor Ladder Using Built-In Threshold Calibration

A subranging analog-to-digital converter (ADC) features high-speed and relatively low-power. The limiting factors of power reduction in subranging ADCs are the resistor ladder and the comparator. We propose an ADC architecture combining a capacitive digital-to-analog convertor and built-in threshold calibration to eliminate the resistor ladder, resulting in a low-power subranging ADC. We also propose a calibration technique comprising of metal-oxide-metal capacitor, MOS switch, and scaling capacitor to reduce the power consumption of the comparator and an offset drift compensation technique to enable precise foreground calibration. We designed an 8-bit, 1-GHz subranging ADC by applying these techniques, and post-layout simulation results demonstrated a power consumption of 7 mW and figure of merit of 51 fJ/conv.-step.

MATLAB/Simulink Modeling and Experimental Resultsof a PEM Electrolyzer Powered by a Solar Panel

In this paper, the solar panels are used to power an electrolyzer to separate the water into hydrogen and oxygen gas. Theelectrical equivalent circuit for the proton exchange membrane electrolyzer was developed and implemented in MATLAB/Simulinkalong with the atmospheric hydrogen storage tank. The voltage （2 volt） and current （1 ampere） were supplied in a similar manner inorder to compare the simulated and experimental results. The hydrogen amount is calculated to be 7.345 （ml/min A） from the modelas well as the experimental set-up. The experimental and simulation results were matched.

Development of the Operating Circuit for a LED Lamp Based on the Cockcroft-Walton Circuit

The operating circuits for LED （light emitting diode） lamp composed of diodes and DC capacitors only are proposed. The proposed circuit is based on a double-voltage rectifier circuit and a Cockcroft-Walton circuit. The circuit can operate LED without flicker, and is free from switching noise since high frequency switching circuit is not used. To replace an AC capacitor by a DC capacitor for the ballast, a diode is connected across the capacitor in parallel, and the operating voltage of LED unit is kept at the value greater than the peak voltage of the input power source. The circuit realizes high efficiency and high input power factor compared with the operating circuits on the market. Cockcroft-Walton-type circuit can operate many LED devices in series connection. Series connection is preferable for fabricating LED unit of a constant voltage characteristic. Moreover, fairly flat waveform of LED operating current is realized by Cockcrofl-Walton-type circuit, even though capacitor ballast is used.

Overview of the Power Supply System on the HL-2A Tokamak

This paper shows the R＆D results of the power supply system in 2006, including the application of speed control assemblies of two 80 MVA MG sets, the modification of the exciting field system, the development of the new HV modulators in ECRH system, the update of several poloidal power supplies. It also presents the status of the power suppIy system in HL-2A experimental operation and foresees the power and energy requirements for new power supply system at HL-2M device.

Latest developments in room-temperature semiconductor neutron detectors: Prospects and challenges

Semiconductor-based neutron-detectors are characterized by small size, high energy-resolution, good spatial resolution, and stable response(at the depletion voltage). Consequently, these neutron-detectors are important for the fields of nuclear proliferation prevention, oil exploration, monitoring neutron-scattering experiments, cancer treatments, and space radiation effect research. However, there are some well-known problems for conventional silicon-based neutron detectors: low neutron-detection efficiency and limited resistance to radiation. Therefore, critical improvements are needed to enable sufficiently effective and practical neutron detection. To address these problems, direct-conversion neutron detectors as well as wide bandgap semiconductor-based detectors have been developed and studied intensely during the past years. Significant progress with respect to detection efficiency, radiation resistance, and room temperature operation was achieved. This paper reviews the latest research highlights, remaining challenges, and emerging technologies of direct-conversion neutron detectors as well as wide-bandgap semiconductor neutron detectors. This compact review serves as a reference for researchers interested in the design and development of improved neutron detectors in the future.

A capacitive DAC with custom 3-D 1-fF MOM unit capacitors optimized for fastsettling routing in high speed SAR ADCs

Asynchronous successive approximation register （SAR） analog-to-digital converters （ADC） feature high energy efficiency but medium performance. From the point of view of speed, the key bottleneck is the unit ca- pacitor size. In this paper, a small size three-dimensional （3-D） metal-oxide-metal （MOM） capacitor is proposed. The unit capacitor has a capacitance of 1-fF. It shapes as an umbrella, which is designed for fast settling consideration. A comparison among the proposed capacitor with other 3-D MOM capacitors is also given in the paper. To demonstrate the effectiveness of the MOM capacitor, a 6-b capacitive DAC is implemented in TSMC 1P9M 65 nm LP CMOS technology. The DAC consumes a power dissipation of 0.16 mW at the rate of 100 MS/s, excluding a source-follower based output buffer. Static measurement result shows that 1NL is less than -4-1 LSB and DNL is less than ＋0.5 LSB. In addition, a 100 MS/s 9-bit SAR ADC with the proposed 3-D capacitor is simulated.

An ultra-compact polarization-insensitive slot-strip mode converter

Integrated waveguides with slot structures have attracted increasing attention due to their advantages of tight mode confinement and strong light-matter interaction.Although extensively studied,the issue of mode mismatch with other strip waveguide-based optical devices is a huge challenge that prevents integrated waveguides from being widely utilized in large-scale photonic-based circuits.In this paper,we demonstrate an ultra-compact low-loss slot-strip converter with polarization insensitivity based on the multimode interference(MMI)effect.Sleek sinusoidal profiles are adopted to allow for smooth connection between the slot and strip waveguide,resulting reflection reduction.By manipulating the MMI effect with structure optimization,the self-imaging positions of the TE0 and TM0 modes are aligned with minimized footprint,leading to low-loss transmission for both polarizations.The measurement results show that high coupling efficiencies of−0.40 and−0.64 dB are achieved for TE_(0) and TM_(0) polarizations,respectively.The device has dimensions as small as 1.1μm×1.2μm and composed of factory-available structures.The above characteristics of our proposed compact slot-strip converter makes it a promising device for future deployment in multi-functional integrated photonics systems.

Experimental research on a THGEM-based thermal neutron detector

A new thermal neutron detector with a domestically produced THGEM （Thick Gas Electron Multiplier） was developed as an alternative to 3He to meet the needs of the next generation of neutron facilities. One type of Au-coated THGEM was designed specifically for neutron detection. A detector prototype has been developed and the preliminary experimental tests are presented, including the performance of the Au-coated THGEM working in At/CO2 gas mixtures and the neutron imaging test with 252 Cf source, which can provide the reference for experimental data for research in the future.

A differential automatic gain control circuit with two-stage -10 to 50 dB tuning range VGAs

A differential automatic gain control （AGC） circuit is presented. The AGC architecture contains twostage variable gain amplifiers （VGAs） which are implemented with a Gilbert cell, a peak detector （PD）, a low pass filter, an operational amplifier, and two voltage to current （V-I） convertors. One stage VGA achieves 30 dB gain due to the use of active load. The AGC circuit is implemented in UMC 0.18-um single-poly six-metal CMOS process technology. Measurement results show that the final differential output swing of the 2nd stage VGA is about 0.9-Vpp; the total gain of the two VGAs can be varied linearly from -10 to 50 dB when the control voltage varies from 0.3 to 0.9 V. The final circuit （containing output buffers and a band-gap reference） consumes 37 mA from single 1.8 V voltage supply. For a 50 mV amplitude 60% modulation depth input AM signal it needs 100 us to stabilize the output. The frequency response of the circuit has almost a constant -3 dB bandwidth of 2.2 MHz. Its OIP3 result is at 19 dBm.

On-chip frequency compensation with a dual signal path operational transconductance amplifier for a voltage mode control DC/DC converter

A novel onchip frequency compensation circuit for a voltagemode control DC/DC converter is pre sented. By employing an RC network in the two signal paths of an operational transconductance amplifier （OTA）, the proposed circuit generates two zeros to realize high closedloop stability. Meanwhile, full onchip integration is also achieved due to its simple structure. Hence, the number of offchip components and the board space is greatly reduced. The structure of the dual signal path OTA is also optimized to help get a better transition response. Im plemented in a 0.5 #m CMOS process, the voltage mode control DC/DC converter with the proposed frequency compensation circuit exhibits good stability. The test results show that both load and line regulations are less than 0.3%, and the output voltage can be recovered within 15 #s for a 400 mA load step. Moreover, the compensation components area is less than 2% of the die＇s area and the board space is also reduced by 11%. The efficiency of the whole chip can be up to 95%.

Power enhancement of pontoon-type wave energy convertor via hydroelastic response and variable power take-off system

Wave energy has gained its popularity in recent decades due to the vast amount of untapped wave energy resources.There are numerous types of wave energy convertor(WEC)being proposed and to be economically viable,various means to enhance the power generation from WECs have been studied and investigated.In this paper,a novel pontoon-type WEC,which is formed by multiple plate-like modules connected by hinges,are considered.The power enhancement of this pontoon-type WEC is achieved by allowing certain level of structural deformation and by utilizing a series of optimal variable power take-off(PTO)system.The wave energy is converted into useful electricity by attaching the PTO systems on the hinge connectors such that the mechanical movements of the hinges could produce electricity.In this paper,various structural rigidity of the interconnected modules are considered by changing the material Young’s modulus in order to investigate its impact on the power enhancement.In addition,the genetic algorithm optimization scheme is utilized to seek for the optimal PTO damping in the variable PTO system.It is observed that under certain condition,the flexible pontoon-type WEC with lesser connection joints is more effective in generating energy as compared to its rigid counterpart with higher connection joints.It is also found that the variable PTO system is able to generate greater energy as compared to the PTO system with constant/uniform PTO damping.

A low power cyclic ADC design for a wireless monitoring system for orthopedic implants

This paper presents a low power cyclic analog-to-digital convertor （ADC） design for a wireless monitoring system for orthopedic implants. A two-stage cyclic structure including a single to differential converter, two multiplying DAC functional blocks （MDACs） and some comparators is adopted, which brings moderate speed and moderate resolution with low power consumption. The MDAC is implemented with the common switched capacitor method. The 1.5-bit stage greatly simplifies the design of the comparator. The operational amplifier is carefully op- timized both in schematic and layout for low power and offset. The prototype chip has been fabricated in a United Microelectronics Corporation （UMC） 0.18-μm 1P6M CMOS process. The core of the ADC occupies only 0.12 mm2. With a 304.7-Hz input and 4-kHz sampling rate, the measured peak SNDR and SFDR are 47.1 dB and 57.8 dBc respectively and its DNL and INL are 0.27 LSB and 0.3 LSB, respectively. The power consumption of the ADC is only 12.5 μW in normal working mode and less than 150 nW in sleep mode.

An 8-b 300MS/s folding and interpolating ADC for embedded applications

A 1,4-V 8-bit 300-MS/s folding and interpolating analog-to-digital converter（ADC） is proposed.Fabricated in the 0.13-μm CMOS process and occupying only 0.6-mm^2 active area,the ADC is especially suitable for embedded applications.The system is optimized for a low-power purpose.Pipelining sampling switches help to cut down the extra power needed for complete settling.An averaging resistor array is placed between two folding stages for power-saving considerations.The converter achieves 43.4-dB signal-to-noise and distortion ratio and 53.3-dB spurious-free dynamic range at 1-MHz input and 42.1-dB and 49.5-dB for Nyquist input.Measured results show a power dissipation of 34 mW and a figure of merit of 1.14 pJ/convstep at 250-MHz sampling rate at 1.4-V supply.