为提高运动想象脑机接口识别准确率,结合共空间模式(common spatial pattern,CSP)和卷积神经网络(convolutional neural network,CNN)方法,提出一种改进滤波器组共空间模式(filter bank common spatial pattern,FBCSP)和CNN的算法,用于...为提高运动想象脑机接口识别准确率,结合共空间模式(common spatial pattern,CSP)和卷积神经网络(convolutional neural network,CNN)方法,提出一种改进滤波器组共空间模式(filter bank common spatial pattern,FBCSP)和CNN的算法,用于多分类运动想象脑电信号识别任务。信号预处理后,使用包含重叠频带的FBCSP计算空间投影矩阵,数据经过投影得到更有区分度的特征序列。然后将特征序列以二维排列方式输入搭建的CNN模型中进行分类。所提出方法在脑机接口竞赛数据集2a和Ⅲa上验证,并和其他文献方法对比。结果表明,本文方法一定程度上提高了运动想象脑电信号的分类准确率,为运动想象研究提供了一个有效办法。展开更多
In a coordinated road network,the optimal common cycle time is determined by evaluating the performance of the network in the given range of cycles. Normally,this range is determined by users 'experience. And a la...In a coordinated road network,the optimal common cycle time is determined by evaluating the performance of the network in the given range of cycles. Normally,this range is determined by users 'experience. And a large range of common cycle time,e. g. [30,200] is chosen,which requires long computation time. This study considers that the optimal common cycle time ranges between the minimal and maximal value of intersections' individual optimal cycle time. It is proved mathematically from the convexity condition,that the delay of the network and each individual intersection are convex functions of the cycle time according to Webster delay model. Finally,2 000 random cases for the network composed of two intersections and of eight intersections are created to underline the proposed conclusions. The results of all cases confirm the validity,and show up to 90% improvement in computation time to compare with experience range. The signal optimization tool,Synchro,is also used to validate the conclusion by 50 random cases. The results confirm reliability further.展开更多
According to questions in the design of high quality small signal amplifier, this paper gave a new-type high performance small signal amplifier. The paper selected the operational amplifier of ICL Company and designed...According to questions in the design of high quality small signal amplifier, this paper gave a new-type high performance small signal amplifier. The paper selected the operational amplifier of ICL Company and designed a new-type circuit with simple, low cost and excellent performance,展开更多
Voltage divider biasing common emitter amplifier is one of the core contents in analog circuit curriculum, and almost all of traditional textbooks apply approximate calculation method to estimate all characteristic pa...Voltage divider biasing common emitter amplifier is one of the core contents in analog circuit curriculum, and almost all of traditional textbooks apply approximate calculation method to estimate all characteristic parameters. In calculating quiescent point, transistor base current is generally ignored to get the approximate base potential and emitter current, then other operating parameters, and AC small signal parameters can be acquired. The main purpose of this paper is to compare traditional and Thevenin equivalent methods and to get the difference of the two methods. A Formula is given to calculate the error of the traditional method. Example calculating reveals that the traditional method can generate an error about 10%, and even severe for small signal amplifier with higher quiescent point.展开更多
文摘为提高运动想象脑机接口识别准确率,结合共空间模式(common spatial pattern,CSP)和卷积神经网络(convolutional neural network,CNN)方法,提出一种改进滤波器组共空间模式(filter bank common spatial pattern,FBCSP)和CNN的算法,用于多分类运动想象脑电信号识别任务。信号预处理后,使用包含重叠频带的FBCSP计算空间投影矩阵,数据经过投影得到更有区分度的特征序列。然后将特征序列以二维排列方式输入搭建的CNN模型中进行分类。所提出方法在脑机接口竞赛数据集2a和Ⅲa上验证,并和其他文献方法对比。结果表明,本文方法一定程度上提高了运动想象脑电信号的分类准确率,为运动想象研究提供了一个有效办法。
基金Sponsored by German Aerospace Center(Grant I.MoVe AP3200 Nicht-kooperative Verkehrssteuerung)
文摘In a coordinated road network,the optimal common cycle time is determined by evaluating the performance of the network in the given range of cycles. Normally,this range is determined by users 'experience. And a large range of common cycle time,e. g. [30,200] is chosen,which requires long computation time. This study considers that the optimal common cycle time ranges between the minimal and maximal value of intersections' individual optimal cycle time. It is proved mathematically from the convexity condition,that the delay of the network and each individual intersection are convex functions of the cycle time according to Webster delay model. Finally,2 000 random cases for the network composed of two intersections and of eight intersections are created to underline the proposed conclusions. The results of all cases confirm the validity,and show up to 90% improvement in computation time to compare with experience range. The signal optimization tool,Synchro,is also used to validate the conclusion by 50 random cases. The results confirm reliability further.
文摘According to questions in the design of high quality small signal amplifier, this paper gave a new-type high performance small signal amplifier. The paper selected the operational amplifier of ICL Company and designed a new-type circuit with simple, low cost and excellent performance,
文摘Voltage divider biasing common emitter amplifier is one of the core contents in analog circuit curriculum, and almost all of traditional textbooks apply approximate calculation method to estimate all characteristic parameters. In calculating quiescent point, transistor base current is generally ignored to get the approximate base potential and emitter current, then other operating parameters, and AC small signal parameters can be acquired. The main purpose of this paper is to compare traditional and Thevenin equivalent methods and to get the difference of the two methods. A Formula is given to calculate the error of the traditional method. Example calculating reveals that the traditional method can generate an error about 10%, and even severe for small signal amplifier with higher quiescent point.
