Current Polarity Detection and Current Compensation Strategy for PAC Based Three-Phase ZVS PWM Converter

A novel software implementation for current polarity detection and current compensation is presented. For a three-phase zero-voltage soft-switching （ZVS） PWM converter based on phase and amplitude control （PAC）, when saw-tooth carriers with alternate positive and negative slopes are adopted, the positive or negative slopes are chosen according to the phase current polarity. Since polarity reversal causes current distortion, current at the instant of reversal should be compensated for. Based on the characteristic of unity power factor converter in rectification and regeneration modes, a software implementation for current polarity detection is proposed. Distortion of current zero-crossing caused by using saw-tooth carriers with alternate positive and negative slopes is analyzed, and the relevant compensation method is proposed. Experimental study with a 1.5 kW device shows that phase current has a small harmonic content and power factor is high both in rectification and regeneration modes.

Adaptive current compensation with nonlinear disturbance observer for single-sided linear induction motor considering dynamic eddy-effect

An adaptive current compensation control for a single-sided linear induction motor(SLIM) with nonlinear disturbance observer was developed. First, to maintain t-axis secondary component flux constant with consideration of the specially dynamic eddy-effect(DEE) of the SLIM, a instantaneously tracing compensation of m-axis current component was analyzed. Second,adaptive current compensation based on Taylor-discretization algorithm was proposed. Third, an effective kind of nonlinear disturbance observer(NDOB) was employed to estimate and compensate the undesired load vibrations, then the robustness of the control system could be guaranteed. Experimental verification of the feasibility of the proposed method for an SLIM control system was performed, and it showed that the proposed adaptive compensation scheme with NDOB could significantly promote speed dynamical response and minimize speed ripple under the conditions of external load coupled vibrations and unavoidable feedback control variables measured errors, i.e., current and speed.

HIGH TEMPERATURE DISPLACEMENT SENSOR

A high temperature displacement sensor based on the principle of eddy-current is investigated. A new temperature compensation technique by using eddy-current effect is presented to satisfy the special requirement at high temperature up to 550℃. The experiment shows that the temperature compensation technique leads to good temperature stability for the sensors. The variation of the sensitivity as well as the temperature drift of the sensor with temperature compensation technique is only about 7.4% and 90-350 mV at 550 ℃ compared with that at room temperature, and that of the sensor without temperature compensation technique is about 31.2% and 2-3 V at 550 ℃ compared with that at room temperature. A new dynamic calibration method for the eddy-current displacement sensor is presented, which is very easy to be realized especially in high frequency and at high temperatures. The high temperature displacement sensors developed are successfully used at temperature up to 550 ℃ in a magnetic bearing system for more than 100 h.

A curvature calibrated bandgap reference with base-emitter current compensating in a 0.13μm CMOS process

In bandgap references,the effect caused by the input offset of the operational amplifier can be effectively reduced by the utilization of cascade bipolar junction transistors（BJTs）.But in modern CMOS logic processes,due to the small value ofβ,the base-emitter path of BJTs has a significant streaming effect on the collector current,which leads to a large temperature drift for the reference voltage.To solve this problem,a base-emitter current compensating technique is proposed in a cascade BJT bandgap reference structure to calibrate the curvature of the output voltage to temperature.Experimental results based on the 0.13μm logic CMOS process show that the reference voltage is 1.238 V and the temperature coefficient is 6.2 ppm/℃within the range of-40 to 125℃.

Underwater docking of an under-actuated autonomous underwater vehicle:system design and control implementation

Underwater docking greatly facilitates and extends operation of an autonomous underwater vehicle(AUV) without the support of a surface vessel. Robust and accurate control is critically important for docking an AUV into a small underwater funneltype dock station. In this paper, a docking system with an under-actuated AUV is presented, with special attention paid to control algorithm design and implementation. For an under-actuated AUV, the cross-track error can be controlled only via vehicle heading modulation, so both the cross-track error and heading error have to be constrained to achieve successful docking operations, while the control problem can be even more complicated in practical scenarios with the presence of unknown ocean currents. To cope with the above issues, a control scheme of a three-hierarchy structure of control loops is developed, which has been embedded with online current estimator/compensator and effective control parameter tuning. The current estimator can evaluate both horizontal and vertical current velocity components, based only on the measurement of AUV's velocity relative to the ground; in contrast, most existing methods use the measurements of both AUV's velocities respectively relative to the ground and the water column. In addition to numerical simulation, the proposed docking scheme is fully implemented in a prototype AUV using MOOS-IvP architecture. Simulation results show that the current estimator/compensator works well even in the presence of lateral current disturbance. Finally, a series of sea trials are conducted to validate the current estimator/compensator and the whole docking system. The sea trial results show that our control methods can drive the AUV into the dock station effectively and robustly.

Design of improved CMOS phase-frequency detector and charge-pump for phase-locked loop

Two essential blocks for the PLLs based on CP, a phase-frequency detector （PFD） and an improved current steering charge-pump （CP）, are developed. The mechanisms for widening the phase error detection range and eliminating the dead zone are analyzed and applied in our design to optimize the proposed PFD. To obtain excellent current matching and minimum current variation over a wide output voltage range, an improved structure for the proposed CP is developed by fully utilizing many additional sub-circuits. Implemented in a standard 90-nm CMOS process, the proposed PFD achieves a phase error detection range from -354° to 354° and the improved CP demonstrates a current mismatch of less than 1.1% and a pump-current variation of 4% across the output voltage, swinging from 0.2 to 1.1 V, and the power consumption is 1.3 mW under a 1.2-V supply.

A new active power filter topology based on a chopper circuit

Active power filters （APFs） are widely used for their outstanding performance in current and voltage rip- ple compensation. As modern high-energy accelerators are demanding much more stringent current ripple guidelines, APFs are used in the magnet power supply （MPS） in accelerator systems. However, conventional APFs have many drawbacks due to the traditional topology, such as complex structure, nonadjustable working voltage, requirement of power supply, and so on. This paper proposes a new APF topology, which works as two types of chopper circuits. This APF does not need extra electricity, but uses the power of the MPS current ripple to realize ripple depression. Experimental results prove its feasibility and effectiveness.

1.5μm, 8×12.5Gb/s of hybrid-integrated TOSA with isolators and ROSA for 100GbE application

Compact transmitter and receiver optical sub-assemblies（TOSA and ROSA） are fabricated in our laboratory and have an aggregated capacity of 100 Gb/s. Specially, directly modulated laser（DML） drivers with two layers of electrical circuit boards are designed to inject RF signals and bias currents separately. For all the lanes, the3 dB bandwidth of the cascade of the TOSA and ROSA exceeds 9 GHz, which allows the 12.5 Gb/s operation.With the 12.5 Gb/s × 8-lane operation, clear eye diagrams for back-to-back and 30-km amplified transmission with a dispersion compensation fiber are achieved. Low cost and simple processing technology make it possible to realize commercial production.