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A novel circuit design for complementary resistive switch-based stateful logic operations
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作者 王小平 陈林 +1 位作者 沈轶 徐博文 《Chinese Physics B》 SCIE EI CAS CSCD 2016年第5期461-469,共9页
Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch(CRS)-based stateful log... Recently, it has been demonstrated that memristors can be utilized as logic operations and memory elements. In this paper, we present a novel circuit design for complementary resistive switch(CRS)-based stateful logic operations. The proposed circuit can automatically write the destructive CRS cells back to the original states. In addition, the circuit can be used in massive passive crossbar arrays which can reduce sneak path current greatly. Moreover, the steps for CRS logic operations using our proposed circuit are reduced compared with previous circuit designs. We validate the effectiveness of our scheme through Hspice simulations on the logic circuits. 展开更多
关键词 MEMRISTOR complementary resistive switch crossbar arrays logic circuits
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Nonvolatile Resistive Switching and Physical Mechanism in LaCrO3 Thin Films 被引量:1
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作者 胡万景 胡令 +5 位作者 魏仁怀 汤现武 宋文海 戴建明 朱雪斌 孙玉平 《Chinese Physics Letters》 SCIE CAS CSCD 2018年第4期98-102,共5页
Polycrystalline LaCrO3(LCO) thin films are deposited on Pt/Ti/SiO2/Si substrates by pulsed laser deposition and used as the switching material to construct resistive random access memory devices. The unipolar resist... Polycrystalline LaCrO3(LCO) thin films are deposited on Pt/Ti/SiO2/Si substrates by pulsed laser deposition and used as the switching material to construct resistive random access memory devices. The unipolar resistive switching(RS) behavior in the Au/LCO/Pt devices exhibits a high resistance ratio of ~104 between the high resistance state(HRS) and low resistance state(LRS) and exhibits excellent endurance/retention characteristics.The conduction mechanism of the HRS in the high voltage range is dominated by the Schottky emission, while the Ohmic conduction dictates the LRS and the low voltage range of HRS. The RS behavior in the Au/LCO/Pt devices can be understood by the formation and rupture of conducting filaments consisting of oxygen vacancies,which is validated by the temperature dependence of resistance and x-ray photoelectron spectroscopy results.Further analysis shows that the reset current IR and reset power PR in the reset processes exhibit a scaling law with the resistance in LRS(R0), which indicates that the Joule heating effect plays an essential role in the RS behavior of the Au/LCO/Pt devices. 展开更多
关键词 La Cr HRS LRS PT Nonvolatile resistive switching and Physical Mechanism in LaCrO3 Thin Films
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A DESIGN OF 0.25μm CMOS SWITCH
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作者 Han Lei Yang Tao +3 位作者 Xie Jun Wang Yong You Yu Zhang Bo 《Journal of Electronics(China)》 2006年第5期745-747,共3页
Single-Pole Double-Throw (SPDT) broadband switch has been designed in a 0.25μm Comple- mentary Metal Oxide Semiconductor (CMOS) process. To optimize the performance of isolation and insertion loss, based on normal de... Single-Pole Double-Throw (SPDT) broadband switch has been designed in a 0.25μm Comple- mentary Metal Oxide Semiconductor (CMOS) process. To optimize the performance of isolation and insertion loss, based on normal design, the effects of Gate Series Resistances (GSR) on insertion loss and switching time are analyzed for the first time. The compatible GSRs are chosen by the analyses. The fabricated chips were tested and the results show the switch isolation from DC (Direct Current) to 1GHz exhibits 55dB and insertion loss lower than 2.1dB. 展开更多
关键词 RF 射电频率 CMOS GSR 开关时间
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基于互补电阻开关的忆阻乘法器设计
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作者 李志刚 陈辉 +1 位作者 刘鹏 武继刚 《计算机工程》 CAS CSCD 北大核心 2023年第1期201-209,共9页
现有的忆阻算术逻辑多采用单个忆阻器作为存储单元,在忆阻交叉阵列中易受到漏电流以及设计逻辑电路时逻辑综合复杂度高的影响,导致当前乘法器设计中串行化加法操作的延时和面积开销增加。互补电阻开关具有可重构逻辑电路的运算速度和抑... 现有的忆阻算术逻辑多采用单个忆阻器作为存储单元,在忆阻交叉阵列中易受到漏电流以及设计逻辑电路时逻辑综合复杂度高的影响,导致当前乘法器设计中串行化加法操作的延时和面积开销增加。互补电阻开关具有可重构逻辑电路的运算速度和抑制忆阻交叉阵列中漏电流的性能,是实现忆阻算术逻辑的关键器件。提出一种弱进位依赖的忆阻乘法器。为提升忆阻器的逻辑性能,基于互补电阻开关电路结构,设计两种加法器的优化方案,简化操作步骤。在此基础上,通过改进传统的乘法实现方式,并对进位数据进行拆解,降低运算过程中进位数据之间的依赖性,实现并行化的加法运算。将设计的乘法器映射到混合CMOS/crossbar结构中,乘法计算性能得到大幅提高。在Spice仿真环境下验证所提乘法器的可行性。仿真实验结果表明,与现有的乘法器相比,所提乘法器的延时开销从O(n2)降低为线性级别,同时面积开销降低约70%。 展开更多
关键词 忆阻器 互补电阻开关 混合CMOS/crossbar结构 加法器 乘法器
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高性能栅压自举开关的设计 被引量:1
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作者 穆敏宏 叶凡 陈勇臻 《半导体技术》 CSCD 北大核心 2017年第9期663-668,共6页
对模数转换器中的传统开关电路的导通电阻进行了详细的理论分析,提出了一种互补型栅压自举开关电路。该电路结构相比于传统开关,通过少量的功耗代价换取了更优的频域性能,在不同工艺角下具有更好的鲁棒性,适用于先进工艺下的低电压工作... 对模数转换器中的传统开关电路的导通电阻进行了详细的理论分析,提出了一种互补型栅压自举开关电路。该电路结构相比于传统开关,通过少量的功耗代价换取了更优的频域性能,在不同工艺角下具有更好的鲁棒性,适用于先进工艺下的低电压工作环境。互补型栅压自举开关电路采用28 nm工艺设计,在1 V的电源电压下,对800 f F的负载电容进行速率为800 MS/s的采样,在低频输入下(181.25 MHz)实现的无杂散动态范围(SFDR)为89 d B,四倍奈奎斯特输入频率下(1 556 MHz)实现的SFDR为65 d B,开关电路面积为80μm×20μm。 展开更多
关键词 模数转换器(ADC) 栅压自举采样开关 互补型开关 导通电阻 沟道电荷注入
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基于互补式忆阻器的多路复用器设计与实现 被引量:2
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作者 赵毅 陈辉 +1 位作者 刘鹏 武继刚 《微电子学与计算机》 2022年第5期96-103,共8页
针对现有忆阻器逻辑设计方法所需忆阻器数量较大和操作步骤较多的问题,提出一种基于互补式忆阻器(complementary resistive switches,CRS)的灵活配置同行忆阻器的逻辑设计方法.通过对施加于CRS的高电压设置电压约束,更快速地实现布尔逻... 针对现有忆阻器逻辑设计方法所需忆阻器数量较大和操作步骤较多的问题,提出一种基于互补式忆阻器(complementary resistive switches,CRS)的灵活配置同行忆阻器的逻辑设计方法.通过对施加于CRS的高电压设置电压约束,更快速地实现布尔逻辑,并利用该方法实现了四种基本逻辑门,分别是与逻辑(AND)、或逻辑(OR)、非蕴含逻辑(not-material implication,NIMP)和异或逻辑(XOR)门.在此基础上,利用所设计逻辑中蕴含的与逻辑运算和或逻辑运算,设计了2-1和4-1多路复用器电路并提出其实现方法,其中2-1多路复用器可使用3个忆阻器通过2个步骤来实现,4-1多路复用器可使用6个忆阻器通过5个步骤来实现,并通过SPICE仿真来验证该方法的可行性.与忆阻器蕴含逻辑(material implication logic,IMPLY)和忆阻器辅助逻辑(memristor aided logic,MAGIC)设计方法相比,本文所提出的方法在保证输入数据不被破坏的前提下同时减少了忆阻器数量和操作步骤,优化了忆阻器实现的2-1多路复用器与4-1多路复用器性能. 展开更多
关键词 忆阻器 互补式忆阻器 逻辑设计 多路复用器
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