An Adaptive Slope Compensation Circuit for Peak Current Mode of Boost Switching Power Supply

Based on the analysis of the basic principle of slope compensation, a high-precision adaptive slope compensation circuit for peak current mode boost DC/DC converter is designed. The circuit dynamically detects the input and output voltage of the boost circuit to realize automatic adjustment of the compensation amount with the change of duty ratio, which makes the ramp compensation slope optimized. The design uses a high-precision subtracter to improve the accuracy of slope compensation. While eliminating sub-slope oscillation and improving the stability of boost circuit, the negative impact of compensation on boost circuit is minimized, and the load capacity and transient response speed of boost circuit are guaranteed. The circuit is designed based on SMIC 0.18um CMOS technology, with simple structure, high reliability and easy engineering implementation. Spectre circuit simulator 17.1.0.124 64b simulation results show that the circuit has high compensation accuracy and wide input and output voltage range. When the working voltage is 3.3 V, the compensation slope can be adjusted adaptively under different duty cycles, and the minimum error between the compensation slope and the theoretical optimal compensation slope is only 0.42%.

Five New MVL Current Mode Differential Absolute Value Circuits Based on Carbon Nano-tube Field Effect Transistors(CNTFETs)

Carbon Nano-Tube Field Effect Transistors(CNTFETs) are being widely studied as possible successors to silicon MOSFETs.Using current mode has many advantages such as performing sum operation by means of a simple wired connection.Also,direction of the current can be used to exhibit the sign of digits.It is expected that the advantages of current mode approaches will become even more important with increased speed requirements and decreased supply voltage.In this paper,we present five new circuit designs for differential absolute value in current mode logic which have been simulated by CNTFET model.The considered base current for this model is 2 μA and supply voltage is 0.9 V.In all of our designs we used N-type CNTFET current mirrors which operate as truncated difference circuits.The operation of Differential Absolute Value circuit calculates the difference between two input currents and our circuit designs are operate in 8 logic levels.

Research of Current Mode Atomic Force Microscopy (C-AFM) for Si/SiC Heterostructures on 6H-SiC(0001)

Si/SiC heterostructures with different growth temperatures were prepared on 6 HSiC(0001)by LPCVD.Current mode atomic force microscopy and transmission electron microscopy were employed to investigate the electrical properties and crystalline structure of Si/SiC heterostructures.Face-centered cubic(FCC)on hexagonal close-packing(HCP)epitaxy of the Si(111)/SiC(0001)heterostructure was realized at 900°C.As the growth temperature increases to1050°C,the<110>preferred orientation of the Si film is observed.The Si films on 6 H-SiC(0001)with different growth orientations consist of different distinctive crystalline grains:quasi-spherical grains with a general size of 20μm,and columnar grains with a typical size of 7μm×20μm.The electrical properties are greatly influenced by the grain structures.The Si film with<110>orientation on SiC(0001)consists of columnar grains,which is more suitable for the fabrication of Si/SiC devices due to its low current fluctuation and relatively uniform current distribution.

Reversible Logic Based MOS Current Mode Logic Implementation in Digital Circuits

Now a days,MOS Current Mode Logic(MCML)has emerged as a better alternative to Complementary Metal Oxide Semiconductor(CMOS)logic in digital circuits.Recent works have only traditional logic gates that have issues with information loss.Reversible logic is incorporated with MOS Current Mode Logic(MCML)in this proposed work to solve this problem,which is used for multiplier design,D Flip-Flop(DFF)and register.The minimization of power and area is the main aim of the work.In reversible logic,the count of outputs and inputs is retained as the same value for creating one-to-one mapping.A unique output vector set can be generated for each input vector set and information loss is also prevented.In reversible MCML based multiplier,reversible logic full adder is utilized to minimize the area and power.D flip-flops based on reversible MCML are often designed to store information that is then combined to form a reversible MCML based register.The proposed reversible MCML multiplier attains average power of 0.683 mW,Reversible MCML based DFF achieves 0.56μW and Reversible MCML based 8-bit register attains 04.04μW.The result shows that the proposed Reversible MCML based multiplier,Reversible MCML based D flip-flop and ReversibleMCML based register achieves better performance in terms of current,power dissipation,average power and area.

Bifurcation and chaos in high-frequency peak current mode Buck converter

Bifurcation and chaos in high-frequency peak current mode Buck converter working in continuous conduction mode（CCM） are studied in this paper. First of all, the two-dimensional discrete mapping model is established. Next, reference current at the period-doubling point and the border of inductor current are derived. Then, the bifurcation diagrams are drawn with the aid of MATLAB. Meanwhile, circuit simulations are executed with PSIM, and time domain waveforms as well as phase portraits in i_L–v_C plane are plotted with MATLAB on the basis of simulation data. After that, we construct the Jacobian matrix and analyze the stability of the system based on the roots of characteristic equations. Finally, the validity of theoretical analysis has been verified by circuit testing. The simulation and experimental results show that,with the increase of reference current I_（ref）, the corresponding switching frequency f is approaching to low-frequency stage continuously when the period-doubling bifurcation happens, leading to the converter tending to be unstable. With the increase of f, the corresponding Irefdecreases when the period-doubling bifurcation occurs, indicating the stable working range of the system becomes smaller.

New Single Input Multiple Output Type Current Mode Biquad Filter Using OTAs

This paper presents a new current mode (CM) single-input and multi-output (SIMO)-type biquad using two multiple output OTAs and one current follower as an active device and having two grounded capacitors. This SIMO type circuit realizes all the five filter functions as low pass, band pass, high pass, band reject and all pass filter transfer functions simultaneously. This circuit has the unity gain transfer function for all the five types of filters. The circuit enjoys electronic tunability of angular frequency and bandwidth. The 0.18 μm TSMC technology process parameters have been utilized to test and verify the performance characteristics of the circuit using PSPICE. The sensitivity analysis, transient response and calculations of total harmonic distortion have also been shown.

PRIMARY SIDE DETECTION AND PEAK CURRENT MODE CONTROL IN FLYBACK CONVERTER

A new cycle-by-cycle control flyback converter with primary side detection and peak current mode control is proposed and its dynamic characteristics are analyzed. The flyback converter is verified by the OrCAD simulator. The main advantages of this converter over the conventional one are simplicity, small size, rapid regulating and no sensing control signals over the isolation barrier. The circuit is suitable for digital control implementations.

Current Mode Logic Testing of XOR/XNOR Circuit: A Case Study

This paper investigates the issue of testing Current Mode Logic (CML) gates. A three-bit parity checker is used as a case study. It is first shown that, as expected, the stuck-at fault model is not appropriate for testing CML gates. It is then proved that switching the order in which inputs are applied to a gate will affect the minimum test set;this is not the case in conventional voltage mode gates. Both the circuit output and its inverse have to be monitored to reduce the size of the test set.

An Improved Non-isolated LED Converter with Power Factor Correction and Average Current Mode Control

A new type of high power LED drivers is proposed by adopting an improved two-stages non-isolated configuration. In order to improve power factor and achieve accurate average current control under universal input voltages ranging from 100 Vrms to 240 Vrms, the power factor correction and average current mode control methods operating in continuous current conduction mode are designed and implemented. With the LUMILEDS emitter type LEDs, a laboratory prototype is built and measured. And from the measured results, it could be concluded that the proposed driver has many better performances such as high power factor, low current harmonic, accurate average current control and switch protection.

Third Order Current Mode Universal Filter Using Only Op.amp. and OTAs

A novel current mode active-only universal filter using four dual current output Operational Transconductance Amplifiers (OTAs) and three Operational Amplifiers (OAs) is presented. The circuit can realize low pass and high pass filter characteristics by choosing the suitable current output branches. The filter performance factors natural frequency (ω0), bandwidth , quality factor Q and transconductance gain gm are electronically tunable. The proposed circuit has very low sensitivities with respect to circuit active elements. From sensitivity analysis, it has been clearly shown that the proposed circuit has very low sensitivities with respect to the circuit active elements. The gain roll-off of high pass and low pass configuration is 18 dB/oc- tave. The proposed circuit facilitates integrability, programmability and ease of implementation.

Investigation of the Mechanism of Tangent Bifurcation in Current Mode Controlled Boost Converter

Tangent bifurcation is a special bifurcation in nonlinear dynamic systems. The investigation of the mechanism of the tangent bifurcation in current mode controlled boost converters operating in continuous conduction mode (CCM) is performed. The one-dimensional discrete iterative map of the boost converter is derived. Based on the tangent bifurcation theorem, the conditions of producing the tangent bifurcation in CCM boost converters are deduced mathematically. The mechanism of the tangent bifurcation in CCM boost is exposed from the viewpoint of nonlinear dynamic systems. The tangent bifurcation in the boost converter is verified by numerical simulations such as discrete iterative maps, bifurcation map and Lyapunov exponent. The simulation results are in agreement with the theoretical analysis, thus validating the correctness of the theory.

Realization of a New Current Mode Second-Order Biquad Using Two Current Follower Transconductance Amplifiers (CFTAs)

A new circuit for realization of universal current-mode filter using current Follower Transconductance Amplifiers (CFTAs) is presented. The proposed circuit realizes current-mode low pass, high pass and band pass filter functions simultaneously with a single current source at the input. The band reject and all pass filters can also be obtained from the proposed circuit without any extra hardware. The proposed circuit employs three passive grounded elements and two CFTAs. Linear electronic control of natural frequency ω0 is available in the proposed circuit. The quality factor can be independently adjusted through grounded resistor. The proposed circuit employs two grounded capacitors and a grounded resistor along with two CFTAs. The grounded resistor can be replaced by an OTA based circuit for linear electronic control of quality factor Q0. The circuit exhibits low active and passive sensitivities for ω0 and Q0. Simulation results are obtained using PSPICE software which is in conformity with the theoretical findings.

Current Mode Universal Filter Using Single Current Controlled Differential Difference Current Conveyor Transconductance Amplifier

This research paper contains a new electronically tunable current-mode biquadratic universal filter using a new active building block;current controlled differential difference current conveyor transconductance amplifier (CCDDCCTA). The proposed filter provides the following important and desirable features: (i) One can use only one CCDDCCTA and two capacitors;(ii) One can get low pass (LP), band pass (BP), high pass (HP), notch (NF) and all pass (AP) current responses from the same configuration without any alteration;(iii) Passive components are grounded, which ease the integrated circuit implementation;(iv) Responses are electronically tunable;and (v) Sensitivity is low. Moreover, the non-ideality analysis shows that the parasitic passive components can be compensated for the proposed circuit. The functionality of the design is verified through SPICE simulations using 0.25 μm CMOS TSMC technology process parameters. Simulation result agrees well with the theoretical analysis.

A current mode feed-forward gain control system for a 0.8 V CMOS hearing aid

A current mode feed-forward gain control（CMFGC）technique is presented,which is applied in the front-end system of a hearing aid chip.Compared with conventional automatic gain control（AGC）,CMFGC significantly improves the total harmonic distortion（THD）by digital gain control.To attain the digital gain control codes according to the extremely weak output signal from the microphone,a rectifier and a state controller implemented in current mode are proposed.A prototype chip has been designed based on a 0.13μm standard CMOS process.The measurement results show that the supply voltage can be as low as 0.6 V.And with the 0.8 V supply voltage,the THD is improved and below 0.06%（-64 dB）at the output level of 500 mV_（p-p）,yet the power consumption is limited to 40μW.In addition,the input referred noise is only 4μV_（rms）and the maximum gain is maintained at 33 dB.

Current mode ADC design in a 0.5-μm CMOS process

This paper presents a pipelined current mode analog to digital converter（ADC） designed in a 0.5-μm CMOS process.Adopting the global and local bias scheme,the number of interconnect signal lines is reduced numerously,and the ADC exhibits the advantages of scalability and portability.Without using linear capacitance,this ADC can be implemented in a standard digital CMOS process;thus,it is suitable for applications in the system on one chip（SoC） design as an analogue IP.Simulations show that the proposed current mode ADC can operate in a wide supply range from 3 to 7 V and a wide quantization range from ±64 to ±256 μA.Adopting the histogram testing method,the ADC was tested in a 3.3 V supply voltage/±64 μA quantization range and a 5 V supply voltage/±256 μA quantization range,respectively.The results reveal that this ADC achieves a spurious free dynamic range of 61.46 dB,DNL/INL are-0.005 to ＋0.027 LSB/-0.1 to ＋0.2 LSB,respectively,under a 5 V supply voltage with a digital error correction technique.

Model based current mode control design and experimental validation for a 3φ rectifier under unbalanced grid voltage conditions

This paper addresses the control design and the experimental validation of a current mode control for a three phase voltage source rectifier. The proposed control law is able to fulfill the voltage regulation and the current tracking control objectives despite of unbalanced and distorted grid voltages. The proposed control law consists of two loops, which are referred as inner tracking loop and the outer voltage regulation loop. The inner loop is designed to provide damping to the system, which also includes and adaptive mechanism. The construction of the current reference is based on the positive component detection of thegrid voltage. Therefore, the current produced by the power rectifier is proportional to the fundamental component of the grid voltage, despite of the presence of unbalanced grid voltages. The voltage regulation loop is designed as a proportional-integral controller, which is aimed to regulate the DC output voltage to a desired level. Finally, experimental results are obtained in an experimental prototype of2 kW to evaluate the performance of the proposed controller.

CURRENT MODE CIRCUIT SYMBOLIC ANALYSIS WITH MATH-EMATICA

提出了用Ｍａｔｈｅｍａｔｉｃａ对电流模式电路进行符号分析的方法．利用Ｍａｔｈｅｍａｔｉｃａ强大的符号分析功能，可以极大地简化电流模式电路的符号分析．有源器件的理想模型用零泛器表示．给出了对ＣＣＩ构成的电流模式滤波器电路的分析实例．

A high linearity current mode second IF CMOS mixer for a DRM/DAB receiver

A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB re- ceiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifier stage. The input transconductance stage employs a self-biasing current reusing technique, with a resistor shunt feedback to increase the gain and output impedance. A dynamic bias technique is used in the switching stage to ensure the stability of the overdrive voltage versus the PVT variations. A current shunt feedback is introduced to the conventional low-voltage second-generation fully balanced multi-output current converter （FBMOCCII）, which provides very low input impedance and high output impedance. With the circuit working in current mode, the linearity is effectively improved with low supply voltages. Especially, the transimpedance stage can be re- moved, which simplifies the design considerably. The design is verified with a SMIC 0.18μm RF CMOS process. The measurement results show that the voltage conversation gain is 1.407 dB, the NF is 16.22 dB, and the IIP3 is 4.5 dBm, respectively. The current consumption is 9.30 mA with a supply voltage of 1.8 W. This exhibits a good compromise among the gain, noise, and linearity for the second IF mixer in DRM/DAB receivers.

Design and implementation of adaptive slope compensation in current mode DC-DC converter

To improve the compensation for the inherent instability in a current mode converter, the adaptive slope compensation, giving attention to the problems of the traditional compensation on compensation accuracy, loading capability and turning jitter, is presented. Based on the analysis of current loop, by detecting the input and output voltage, converting the adaptive slope compensation current, the compensation of the current loop is optimized successfully. It can not only improve the compensation accuracy but also eliminate the over compensation, the turning jitter and the poor loading capability in the reported slope compensation. A power supply chip with adaptive slope compensation has been fabricated in a 0.35 μm CMOS process. The measurement results show that the chip starts up and operates steadily with the constant current limit under conditions of 5 V input voltage, from 10% to 100% duty cycle.

A high linearity current mode multiplier/divider with a wide dynamic range

A high linearity current mode multiplier/divider （CMM/D） with a wide dynamic range is presented. The proposed CMM/D is based on the voltage-current characteristic of the diode, thus wide dynamic range is achieved. In addition, high linearity is achieved because high accuracy current mirrors are adopted and the output current is insensitive to the temperature and device parameters of the fabrication process. Furthermore, no extra bias current for all input signals is required and thus power saving is realized. With proper selection of establishing the input terminal, the proposed circuit can perform as a mulfifunction circuit to he operated as a multiplier/divider, without changing its topology. The proposed circuit is implemented in a 0.25μm BCD process and the chip area is 0.26 ~ 0.24 mm2. The simulation and measurement results show that the maximum static linearity error is 4-1.8% and the total harmonic distortion is 0.4% while the input current ranges from 0 to 200 μA.