The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to...The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to obtain a wide band and a large tuning range,a parallel switched capacitor bank is added in the LC tank.The proposed VCO is implemented in SMIC 0.18-μm RF CMOS technology and the chip area is 750 μm×560 μm,including the test buffer circuit and the pads.Measured results show that the tuning range is 44.6%;i.e.,the frequency turning range is from 2.27 to 3.57 GHz.The measured phase noise is-122.22 dBc/Hz at a 1 MHz offset from the carrier.The maximum power consumption of the core part is 6.16 mW at a 1.8 V power supply.展开更多
A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB re- ceiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifie...A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB re- ceiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifier stage. The input transconductance stage employs a self-biasing current reusing technique, with a resistor shunt feedback to increase the gain and output impedance. A dynamic bias technique is used in the switching stage to ensure the stability of the overdrive voltage versus the PVT variations. A current shunt feedback is introduced to the conventional low-voltage second-generation fully balanced multi-output current converter （FBMOCCII）, which provides very low input impedance and high output impedance. With the circuit working in current mode, the linearity is effectively improved with low supply voltages. Especially, the transimpedance stage can be re- moved, which simplifies the design considerably. The design is verified with a SMIC 0.18μm RF CMOS process. The measurement results show that the voltage conversation gain is 1.407 dB, the NF is 16.22 dB, and the IIP3 is 4.5 dBm, respectively. The current consumption is 9.30 mA with a supply voltage of 1.8 W. This exhibits a good compromise among the gain, noise, and linearity for the second IF mixer in DRM/DAB receivers.展开更多
A CMOS RF（radio frequency） front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawi...A CMOS RF（radio frequency） front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawide frequency band from 200 kHz to 2 GHz as well.Improvement of the NF（noise figure） and IP3（third-order intermodulation distortion） is attained without significant degradation of other performances like voltage gain and power consumption.The NF is minimized by noise-canceling technology,and the IP3 is improved by using differential multiple gate transistors（DMGTR）.The dB-in-linear VGA（variable gain amplifier） exploits a single PMOS to achieve exponential gain control.The circuit is fabricated in 0.18-μm CMOS technology.The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz.The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz.The DSB NF at maximum gain is 3.1-6.1 dB.The IIP3 at middle gain is -4.7 to 0.2 dBm.It consumes a DC power of only 36 mW at 1.8 V supply.展开更多
文摘The wideband CMOS voltage-controlled oscillator（VCO）with low phase noise and low power consumption is presented for a DRM/DAB（digital radio mondiale and digital audio broadcasting）frequency synthesizer.In order to obtain a wide band and a large tuning range,a parallel switched capacitor bank is added in the LC tank.The proposed VCO is implemented in SMIC 0.18-μm RF CMOS technology and the chip area is 750 μm×560 μm,including the test buffer circuit and the pads.Measured results show that the tuning range is 44.6%;i.e.,the frequency turning range is from 2.27 to 3.57 GHz.The measured phase noise is-122.22 dBc/Hz at a 1 MHz offset from the carrier.The maximum power consumption of the core part is 6.16 mW at a 1.8 V power supply.
基金Project supported by the National Natural Science Foundation of China(No.61306069)the National High Technology Research and Development Program of China(No.2011AA010301)
文摘A passive current switch mixer was designed for the second IF down-conversion in a DRM/DAB re- ceiver. The circuit consists of an input transconductance stage, a passive current switching stage, and a current amplifier stage. The input transconductance stage employs a self-biasing current reusing technique, with a resistor shunt feedback to increase the gain and output impedance. A dynamic bias technique is used in the switching stage to ensure the stability of the overdrive voltage versus the PVT variations. A current shunt feedback is introduced to the conventional low-voltage second-generation fully balanced multi-output current converter （FBMOCCII）, which provides very low input impedance and high output impedance. With the circuit working in current mode, the linearity is effectively improved with low supply voltages. Especially, the transimpedance stage can be re- moved, which simplifies the design considerably. The design is verified with a SMIC 0.18μm RF CMOS process. The measurement results show that the voltage conversation gain is 1.407 dB, the NF is 16.22 dB, and the IIP3 is 4.5 dBm, respectively. The current consumption is 9.30 mA with a supply voltage of 1.8 W. This exhibits a good compromise among the gain, noise, and linearity for the second IF mixer in DRM/DAB receivers.
文摘A CMOS RF（radio frequency） front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawide frequency band from 200 kHz to 2 GHz as well.Improvement of the NF（noise figure） and IP3（third-order intermodulation distortion） is attained without significant degradation of other performances like voltage gain and power consumption.The NF is minimized by noise-canceling technology,and the IP3 is improved by using differential multiple gate transistors（DMGTR）.The dB-in-linear VGA（variable gain amplifier） exploits a single PMOS to achieve exponential gain control.The circuit is fabricated in 0.18-μm CMOS technology.The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz.The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz.The DSB NF at maximum gain is 3.1-6.1 dB.The IIP3 at middle gain is -4.7 to 0.2 dBm.It consumes a DC power of only 36 mW at 1.8 V supply.
