A CMOS RF（radio frequency） front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawi...A CMOS RF（radio frequency） front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawide frequency band from 200 kHz to 2 GHz as well.Improvement of the NF（noise figure） and IP3（third-order intermodulation distortion） is attained without significant degradation of other performances like voltage gain and power consumption.The NF is minimized by noise-canceling technology,and the IP3 is improved by using differential multiple gate transistors（DMGTR）.The dB-in-linear VGA（variable gain amplifier） exploits a single PMOS to achieve exponential gain control.The circuit is fabricated in 0.18-μm CMOS technology.The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz.The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz.The DSB NF at maximum gain is 3.1-6.1 dB.The IIP3 at middle gain is -4.7 to 0.2 dBm.It consumes a DC power of only 36 mW at 1.8 V supply.展开更多
This paper focuses on a new design of a down-conversion mixer for a low-IF wideband receiver.Based on the folded structure and differential multiple gated transistor（DMGTR） technique,a novel quadrature mixer with a ...This paper focuses on a new design of a down-conversion mixer for a low-IF wideband receiver.Based on the folded structure and differential multiple gated transistor（DMGTR） technique,a novel quadrature mixer with a high conversion gain,a moderate linearity,and a moderate NF is proposed.The mixer is designed and implemented in a 0.18-m CMOS process,and can operate in a frequency range from 150 kHz to 1.5 GHz.The circuit performance is confirmed by both simulation and measurement results.The measurement results exhibit a peak conversion gain of 13.35 dB,a high third order input referred intercept point of 14.85 dBm,and a moderate single side band noise figure of 10.67 dB.Moreover,the whole quadrature mixer core occupies a compact die area of 0.122 mm2.It consumes a current of 3.96 mA（excluding the output buffers） under a single supply voltage of 1.8 V.展开更多
文摘A CMOS RF（radio frequency） front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawide frequency band from 200 kHz to 2 GHz as well.Improvement of the NF（noise figure） and IP3（third-order intermodulation distortion） is attained without significant degradation of other performances like voltage gain and power consumption.The NF is minimized by noise-canceling technology,and the IP3 is improved by using differential multiple gate transistors（DMGTR）.The dB-in-linear VGA（variable gain amplifier） exploits a single PMOS to achieve exponential gain control.The circuit is fabricated in 0.18-μm CMOS technology.The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz.The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz.The DSB NF at maximum gain is 3.1-6.1 dB.The IIP3 at middle gain is -4.7 to 0.2 dBm.It consumes a DC power of only 36 mW at 1.8 V supply.
基金Project supported by the Innovation Fund of the Ministry of Science & Technology for Small and Medium Scale Enterprises (No.11c26213211234)the National Natural Science Foundation of China (No.61106024)the Specialized Research Fund for the Doc-toral Program of Higher Education,China (No.20090092120012)
文摘This paper focuses on a new design of a down-conversion mixer for a low-IF wideband receiver.Based on the folded structure and differential multiple gated transistor（DMGTR） technique,a novel quadrature mixer with a high conversion gain,a moderate linearity,and a moderate NF is proposed.The mixer is designed and implemented in a 0.18-m CMOS process,and can operate in a frequency range from 150 kHz to 1.5 GHz.The circuit performance is confirmed by both simulation and measurement results.The measurement results exhibit a peak conversion gain of 13.35 dB,a high third order input referred intercept point of 14.85 dBm,and a moderate single side band noise figure of 10.67 dB.Moreover,the whole quadrature mixer core occupies a compact die area of 0.122 mm2.It consumes a current of 3.96 mA（excluding the output buffers） under a single supply voltage of 1.8 V.
