Differential Power Analysis (DPA) is an effective attack method to break the crypto chips and it has been considered to be a threat to security of information system. With analyzing the prin-ciple of resisting DPA,an ...Differential Power Analysis (DPA) is an effective attack method to break the crypto chips and it has been considered to be a threat to security of information system. With analyzing the prin-ciple of resisting DPA,an available countermeasure based on randomization is proposed in this paper. Time delay is inserted in the operation process and random number is precharged to the circuit during the delay time,the normal schedule is disturbed and the power is randomized. Following this meth-odology,a general DPA resistance random precharge architecture is proposed and DES algorithm following this architecture is implemented. This countermeasure is testified to be efficient to resist DPA.展开更多
A power balance static random-access memory（SRAM） for resistance to differential power analysis（DPA） is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanc...A power balance static random-access memory（SRAM） for resistance to differential power analysis（DPA） is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanced by discharging and pre-charging the key nodes of the output circuit and adding an additional shortcircuit current path. Thus, the power consumption is constant in every read cycle. As a result, the DPA-resistant ability of the SRAM is improved. In 65 nm CMOS technology, the power balance SRAM is fully custom designed with a layout area of 5863.6 μm^2.The post-simulation results show that the normalized energy deviation（NED） and normalized standard deviation（NSD） are 0.099% and 0.04%, respectively. Compared to existing power balance circuits, the power balance ability of the proposed SRAM has improved 53%.展开更多
文摘Differential Power Analysis (DPA) is an effective attack method to break the crypto chips and it has been considered to be a threat to security of information system. With analyzing the prin-ciple of resisting DPA,an available countermeasure based on randomization is proposed in this paper. Time delay is inserted in the operation process and random number is precharged to the circuit during the delay time,the normal schedule is disturbed and the power is randomized. Following this meth-odology,a general DPA resistance random precharge architecture is proposed and DES algorithm following this architecture is implemented. This countermeasure is testified to be efficient to resist DPA.
基金Project supported by the Zhejiang Provincial Natural Science Foundation of China(No.LQ14F040001)the National Natural Science Foundation of China(Nos.61274132,61234002)the K.C.Wong Magna Fund in Ningbo University,China
文摘A power balance static random-access memory（SRAM） for resistance to differential power analysis（DPA） is proposed. In the proposed design, the switch power consumption and short-circuit power consumption are balanced by discharging and pre-charging the key nodes of the output circuit and adding an additional shortcircuit current path. Thus, the power consumption is constant in every read cycle. As a result, the DPA-resistant ability of the SRAM is improved. In 65 nm CMOS technology, the power balance SRAM is fully custom designed with a layout area of 5863.6 μm^2.The post-simulation results show that the normalized energy deviation（NED） and normalized standard deviation（NSD） are 0.099% and 0.04%, respectively. Compared to existing power balance circuits, the power balance ability of the proposed SRAM has improved 53%.
