This paper proposed a general purpose real-time image processing system based on a flexible DSP-based Network, which is implemented by a high bandwidth communication channel, links. The links is realized using FPGA an...This paper proposed a general purpose real-time image processing system based on a flexible DSP-based Network, which is implemented by a high bandwidth communication channel, links. The links is realized using FPGA and provides a bandwidth of 12. 8 Gbit/s. Using the links, The topologic of multi-DSP system can be changed online to meet the variabilities of the parallel algorithm of image processing. The system can be assembled with utmost tens of boards and maintain the high communication speed. Analysis of the system adaptivity to image processing is testified followed by actual results. Key words real-time image processing - multi-DSP - flexible - scalable - FPGA - links CLC number TP 303 Foundation item: Supported by the National Natural Science Foundation of China (60135020)Biography: MAO Hai-cen(1973-), male, Ph.D. candidate, research direction: artificial intelligence, expert system, pattern recognition and image processing展开更多
The flexibility of traditional image processing system is limited because those system are designed for specific applications. In this paper, a new TMS320C64x-based multi-DSP parallel computing architecture is present...The flexibility of traditional image processing system is limited because those system are designed for specific applications. In this paper, a new TMS320C64x-based multi-DSP parallel computing architecture is presented. It has many promising characteristics such as powerful computing capability, broad I/O bandwidth, topology flexibility, and expansibility. The parallel system performance is evaluated by practical experiment.展开更多
A novel reconfigurable hardware system which uses both muhi-DSP and FPGA to attain high performance and real-time image processing are presented. The system structure and working principle of mainly processing multi-B...A novel reconfigurable hardware system which uses both muhi-DSP and FPGA to attain high performance and real-time image processing are presented. The system structure and working principle of mainly processing multi-BSP board, extended multi-DSP board are analysed. The outstanding advantage is that the communication among different board components of this system is supported by high speed link ports ＆ serial ports for increasing the system performance and computational power. Then the implementation of embedded real-time operating systems （RTOS） by us is discussed in detail. In this system, we adopt two kinds of parallel structures controlled by RTOS for parallel processing of algorithms. The experimental results show that exploitive period of the system is short, and maintenance convenient. Thus it is suitable for real-time image processing and can get satisfactory effect of image recognition.展开更多
文摘This paper proposed a general purpose real-time image processing system based on a flexible DSP-based Network, which is implemented by a high bandwidth communication channel, links. The links is realized using FPGA and provides a bandwidth of 12. 8 Gbit/s. Using the links, The topologic of multi-DSP system can be changed online to meet the variabilities of the parallel algorithm of image processing. The system can be assembled with utmost tens of boards and maintain the high communication speed. Analysis of the system adaptivity to image processing is testified followed by actual results. Key words real-time image processing - multi-DSP - flexible - scalable - FPGA - links CLC number TP 303 Foundation item: Supported by the National Natural Science Foundation of China (60135020)Biography: MAO Hai-cen(1973-), male, Ph.D. candidate, research direction: artificial intelligence, expert system, pattern recognition and image processing
基金This project was supported by the National Natural Science Foundation of China (60135020).
文摘The flexibility of traditional image processing system is limited because those system are designed for specific applications. In this paper, a new TMS320C64x-based multi-DSP parallel computing architecture is presented. It has many promising characteristics such as powerful computing capability, broad I/O bandwidth, topology flexibility, and expansibility. The parallel system performance is evaluated by practical experiment.
基金This project was supported by the National Natural Science Foundation of China(60135020) National Key Pre-researchProject of China(413010701 -3) .
文摘A novel reconfigurable hardware system which uses both muhi-DSP and FPGA to attain high performance and real-time image processing are presented. The system structure and working principle of mainly processing multi-BSP board, extended multi-DSP board are analysed. The outstanding advantage is that the communication among different board components of this system is supported by high speed link ports ＆ serial ports for increasing the system performance and computational power. Then the implementation of embedded real-time operating systems （RTOS） by us is discussed in detail. In this system, we adopt two kinds of parallel structures controlled by RTOS for parallel processing of algorithms. The experimental results show that exploitive period of the system is short, and maintenance convenient. Thus it is suitable for real-time image processing and can get satisfactory effect of image recognition.
