Wireless Sensor Networks(WSNs) has become a popular research topic due to its resource constraints. Energy consumption and transmission delay is crucial requirement to be handled to enhance the popularity of WSNs. In ...Wireless Sensor Networks(WSNs) has become a popular research topic due to its resource constraints. Energy consumption and transmission delay is crucial requirement to be handled to enhance the popularity of WSNs. In order to overcome these issues, we have proposed an Efficient Packet Scheduling Technique for Data Merging in WSNs. Packet scheduling is done by using three levels of priority queue and to reduce the transmission delay. Real-time data packets are placed in high priority queue and Non real-time data packets based on local or remote data are placed on other queues. In this paper, we have used Time Division Multiple Access(TDMA) scheme to efficiently determine the priority of the packet at each level and transmit the data packets from lower level to higher level through intermediate nodes. To reduce the number of transmission, efficient data merge technique is used to merge the data packet in intermediate nodes which has same destination node. Data merge utilize the maximum packet size by appending the merged packets with received packets till the maximum packet size or maximum waiting time is reached. Real-time data packets are directly forwarded to the next node without applying data merge. The performance is evaluated under various metrics like packet delivery ratio, packet drop, energy consumption and delay based on changing the number of nodes and transmission rate. Our results show significant reduction in various performance metrics.展开更多
According to the analysis of the very high frequency (VHF) self organized time division multiple access (S TDMA) aviation data link, a new dynamic slot assignment scheme is proposed in this paper, which adopts var...According to the analysis of the very high frequency (VHF) self organized time division multiple access (S TDMA) aviation data link, a new dynamic slot assignment scheme is proposed in this paper, which adopts variable data frame structure and can eliminate the effect of the idle slot on message delay. By using queue theory, the analysis models of the new scheme and previous scheme are presented, and the performance of message delay and that of system throughput are analyzed under two schemes. The simulation results show that the new scheme has a better performance than the previous one in the message delay and system throughput.展开更多
Data access delay has become the prominent performance bottleneck of high-end computing systems. The key to reducing data access delay in system design is to diminish data stall time. Memory locality and concurrency a...Data access delay has become the prominent performance bottleneck of high-end computing systems. The key to reducing data access delay in system design is to diminish data stall time. Memory locality and concurrency are the two essential factors influencing the performance of modern memory systems. However, existing studies in reducing data stall time rarely focus on utilizing data access concurrency because the impact of memory concurrency on overall memory system performance is not well understood. In this study, a pair of novel data stall time models, the L-C model for the combined effort of locality and concurrency and the P-M model for the effect of pure miss on data stall time, are presented. The models provide a new understanding of data access delay and provide new directions for performance optimization. Based on these new models, a summary table of advanced cache optimizations is presented. It has 38 entries contributed by data concurrency while only has 21 entries contributed by data locality, which shows the value of data concurrency. The L-C and P-M models and their associated results and opportunities introduced in this study are important and necessary for future data-centric architecture and algorithm design of modern computing systems.展开更多
文摘Wireless Sensor Networks(WSNs) has become a popular research topic due to its resource constraints. Energy consumption and transmission delay is crucial requirement to be handled to enhance the popularity of WSNs. In order to overcome these issues, we have proposed an Efficient Packet Scheduling Technique for Data Merging in WSNs. Packet scheduling is done by using three levels of priority queue and to reduce the transmission delay. Real-time data packets are placed in high priority queue and Non real-time data packets based on local or remote data are placed on other queues. In this paper, we have used Time Division Multiple Access(TDMA) scheme to efficiently determine the priority of the packet at each level and transmit the data packets from lower level to higher level through intermediate nodes. To reduce the number of transmission, efficient data merge technique is used to merge the data packet in intermediate nodes which has same destination node. Data merge utilize the maximum packet size by appending the merged packets with received packets till the maximum packet size or maximum waiting time is reached. Real-time data packets are directly forwarded to the next node without applying data merge. The performance is evaluated under various metrics like packet delivery ratio, packet drop, energy consumption and delay based on changing the number of nodes and transmission rate. Our results show significant reduction in various performance metrics.
基金Aeronautical Science F oundation of China !( N o.98E5 1116)
文摘According to the analysis of the very high frequency (VHF) self organized time division multiple access (S TDMA) aviation data link, a new dynamic slot assignment scheme is proposed in this paper, which adopts variable data frame structure and can eliminate the effect of the idle slot on message delay. By using queue theory, the analysis models of the new scheme and previous scheme are presented, and the performance of message delay and that of system throughput are analyzed under two schemes. The simulation results show that the new scheme has a better performance than the previous one in the message delay and system throughput.
基金The work was supported in part by the National Science Foundation of USA under Grant Nos. CNS-1162540, CCF-0937877, and CNS-0751200. We would like to thank the Scalable Computing Software （SCS） group in the Illi- nois Institute of Technology and anonymous reviewers for their valuable and professional comments on earlier drafts of this work.
文摘Data access delay has become the prominent performance bottleneck of high-end computing systems. The key to reducing data access delay in system design is to diminish data stall time. Memory locality and concurrency are the two essential factors influencing the performance of modern memory systems. However, existing studies in reducing data stall time rarely focus on utilizing data access concurrency because the impact of memory concurrency on overall memory system performance is not well understood. In this study, a pair of novel data stall time models, the L-C model for the combined effort of locality and concurrency and the P-M model for the effect of pure miss on data stall time, are presented. The models provide a new understanding of data access delay and provide new directions for performance optimization. Based on these new models, a summary table of advanced cache optimizations is presented. It has 38 entries contributed by data concurrency while only has 21 entries contributed by data locality, which shows the value of data concurrency. The L-C and P-M models and their associated results and opportunities introduced in this study are important and necessary for future data-centric architecture and algorithm design of modern computing systems.
