The voltage controlled oscillator-based （VCO-based） continuous-time delta-sigma （CTDS） analog to digital converter （ADC） suffers from nonlinearity and mismatch in its feedback network. A new feedback network con...The voltage controlled oscillator-based （VCO-based） continuous-time delta-sigma （CTDS） analog to digital converter （ADC） suffers from nonlinearity and mismatch in its feedback network. A new feedback network consisting of a phase shifter is proposed. The phase shifter replaces the digital to analog converter （DAC） in the proposed architecture. Feasibility of the proposed idea is discussed and its higher performance is illustrated through a behavioral simulation approach （CppSim）. We have also developed the phase shifter as a variable all-pass filter in the C language. The nonlinearity and mismatch of the system caused by DAC is mitigated, resulting in higher signal to noise ratio （SNR） and signal to noise and distortion ratio （SNDR）, respectively.展开更多
为降低流水线模数转换器(ADC)中跨导运算放大器(OTA)设计要求,在分析已有开关电容电路(SC)误差消除技术和流水线ADC误差源的基础上,提出一种改进的流水线ADC开关电容电路及与其匹配的OTA设计方案。采用交叉差分结构,对虚地电容进行了修...为降低流水线模数转换器(ADC)中跨导运算放大器(OTA)设计要求,在分析已有开关电容电路(SC)误差消除技术和流水线ADC误差源的基础上,提出一种改进的流水线ADC开关电容电路及与其匹配的OTA设计方案。采用交叉差分结构,对虚地电容进行了修正,并将电容失配参数在系统传输函数中消去,使开关电容电路对OTA的增益误差要求降低,并使其瞬态功耗下降。采用CM O S 0.18μm工艺设计了一个分辨率为8位、取样速率200 MH z的ADC作为验证原型,仿真结果表明,该优化结构符合ADC电路高速低功耗要求,可作为信号前端处理模块应用到模数转换电路中。展开更多
基金supported by Iran Telecommunication Research Center under Grant No. 4222/500
文摘The voltage controlled oscillator-based （VCO-based） continuous-time delta-sigma （CTDS） analog to digital converter （ADC） suffers from nonlinearity and mismatch in its feedback network. A new feedback network consisting of a phase shifter is proposed. The phase shifter replaces the digital to analog converter （DAC） in the proposed architecture. Feasibility of the proposed idea is discussed and its higher performance is illustrated through a behavioral simulation approach （CppSim）. We have also developed the phase shifter as a variable all-pass filter in the C language. The nonlinearity and mismatch of the system caused by DAC is mitigated, resulting in higher signal to noise ratio （SNR） and signal to noise and distortion ratio （SNDR）, respectively.
文摘为降低流水线模数转换器(ADC)中跨导运算放大器(OTA)设计要求,在分析已有开关电容电路(SC)误差消除技术和流水线ADC误差源的基础上,提出一种改进的流水线ADC开关电容电路及与其匹配的OTA设计方案。采用交叉差分结构,对虚地电容进行了修正,并将电容失配参数在系统传输函数中消去,使开关电容电路对OTA的增益误差要求降低,并使其瞬态功耗下降。采用CM O S 0.18μm工艺设计了一个分辨率为8位、取样速率200 MH z的ADC作为验证原型,仿真结果表明,该优化结构符合ADC电路高速低功耗要求,可作为信号前端处理模块应用到模数转换电路中。
