Amplitude quantization is one of the main sources of spurious noise frequencies in Direct Digital Frequency Synthesizers (DDFSs), which affect their application to many wireless telecommu- nication systems. In this pa...Amplitude quantization is one of the main sources of spurious noise frequencies in Direct Digital Frequency Synthesizers (DDFSs), which affect their application to many wireless telecommu- nication systems. In this paper, two different kinds of spurious signals due to amplitude quantization in DDFSs are exactly formulated in the time domain and detailedly compared in the frequency do- main, and the effects of the DDFS parameter variations on the spurious performance are thoroughly studied. Then the spectral properties and power levels of the amplitude-quantization spurs in the absence of phase-accumulator truncation are emphatically analyzed by waveform estimation and computer simulation, and several important conclusions are derived which can provide theoretical support for parameter choice and spurious performance evaluation in the application of DDFSs.展开更多
提出了一种新的选择迭代式高速高精度CORDIC(COrdinate Rotation Digital Computer)算法.基于表驱动法缩小目标旋转角度,通过改进的基本角度选择方法旁路不必要的迭代;并以移位和减法实现幅度校正,减小硬件资源消耗.设定角度误差小于10^...提出了一种新的选择迭代式高速高精度CORDIC(COrdinate Rotation Digital Computer)算法.基于表驱动法缩小目标旋转角度,通过改进的基本角度选择方法旁路不必要的迭代;并以移位和减法实现幅度校正,减小硬件资源消耗.设定角度误差小于10^(-5)rad时,迭代次数减小至7次以下.在DDFS(Direct Digital Frequency Synthesizer)的应用中,利用区间压缩技术在Xilinx的FPGA中实现20位定点小数电路设计.仿真及实测结果表明,该算法幅度误差小于2×10^(-5),输出延时不大于43.5ns,同时硬件资源消耗不增加.展开更多
Spurious signals in direct digital frequency synthesizers （DDFSs） are partly caused by amplitude quantization and phase truncation, which affect their application to many wireless telecommunication systems. These si...Spurious signals in direct digital frequency synthesizers （DDFSs） are partly caused by amplitude quantization and phase truncation, which affect their application to many wireless telecommunication systems. These signals are deterministic and periodic in the time domain, so they appear as line spectra in the frequency domain. Two types of spurious signals due to amplitude quantization are exactly formulated and compared in the time and frequency domains respectively. Then the frequency spectra and power levels of the spurious signals due to amplitude quantization in the absence of phase-accumulator truncation are emphatically analyzed, and the effects of the DDFS parameter variations on the spurious signals are thoroughly studied by computer simulation. And several important conclusions are derived which can provide theoretical support for parameter choice and spurious performance evaluation in the application of DDFSs.展开更多
为提高移频轨道电路发码装置输出信号的质量及装置的可靠性,设计一种基于直接数字频率合成器(DDS,Direct Digital Synthesizer)芯片的发码装置。该装置由单片机直接控制DDS芯片产生移频信号,经过后级电路放大滤波后,输出到测试环线上,...为提高移频轨道电路发码装置输出信号的质量及装置的可靠性,设计一种基于直接数字频率合成器(DDS,Direct Digital Synthesizer)芯片的发码装置。该装置由单片机直接控制DDS芯片产生移频信号,经过后级电路放大滤波后,输出到测试环线上,供车载天线接收;单片机提供RS-485通信电路用来接收上位机的控制数据、有机发光二极管(OLED,Organic Light-Emitting Diode)显示屏和按键,作为便携式设备的人员操作接口。通过测试验证,该装置可精确输出ZPW-2000和FTGS这2种移频轨道电路的移频键控(FSK,Frequency-Shift Keying)调制信号,提高了输出信号的分辨率和精度,从而减小相邻轨道区段间的干扰,便于机车信号设备的解调。与既有的移频轨道电路发码装置相比,该装置具有信号质量高、结构简单、可靠性高、方便操作的优点。展开更多
This paper presents a high speed ROM-less direct digital frequency synthesizer （DDFS） which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place ...This paper presents a high speed ROM-less direct digital frequency synthesizer （DDFS） which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place of the ROM look-up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS. The design procedure for implementing the nonlinear DAC is presented. To ensure high speed, current mode logic （CML） is used. The chip is implemented in Chartered 0.35μm COMS technology with active area of 2.0 × 2.5 mm^2 and total power consumption of 400 mW at a single 3.3 V supply voltage. The maximum operating frequency is 850 MHz at room temperature and 1.0 GHz at 0℃.展开更多
基金Supported by National High-Technology Research and Development Plan of China (Grant No.2006AA01Z452)
文摘Amplitude quantization is one of the main sources of spurious noise frequencies in Direct Digital Frequency Synthesizers (DDFSs), which affect their application to many wireless telecommu- nication systems. In this paper, two different kinds of spurious signals due to amplitude quantization in DDFSs are exactly formulated in the time domain and detailedly compared in the frequency do- main, and the effects of the DDFS parameter variations on the spurious performance are thoroughly studied. Then the spectral properties and power levels of the amplitude-quantization spurs in the absence of phase-accumulator truncation are emphatically analyzed by waveform estimation and computer simulation, and several important conclusions are derived which can provide theoretical support for parameter choice and spurious performance evaluation in the application of DDFSs.
文摘提出了一种新的选择迭代式高速高精度CORDIC(COrdinate Rotation Digital Computer)算法.基于表驱动法缩小目标旋转角度,通过改进的基本角度选择方法旁路不必要的迭代;并以移位和减法实现幅度校正,减小硬件资源消耗.设定角度误差小于10^(-5)rad时,迭代次数减小至7次以下.在DDFS(Direct Digital Frequency Synthesizer)的应用中,利用区间压缩技术在Xilinx的FPGA中实现20位定点小数电路设计.仿真及实测结果表明,该算法幅度误差小于2×10^(-5),输出延时不大于43.5ns,同时硬件资源消耗不增加.
基金supported by the National Grand Fundamental Research 973 Program of China(2004CB318109)the National High Technology Research and Development Program of China(863 Program)(2006AA01Z452).
文摘Spurious signals in direct digital frequency synthesizers （DDFSs） are partly caused by amplitude quantization and phase truncation, which affect their application to many wireless telecommunication systems. These signals are deterministic and periodic in the time domain, so they appear as line spectra in the frequency domain. Two types of spurious signals due to amplitude quantization are exactly formulated and compared in the time and frequency domains respectively. Then the frequency spectra and power levels of the spurious signals due to amplitude quantization in the absence of phase-accumulator truncation are emphatically analyzed, and the effects of the DDFS parameter variations on the spurious signals are thoroughly studied by computer simulation. And several important conclusions are derived which can provide theoretical support for parameter choice and spurious performance evaluation in the application of DDFSs.
文摘This paper presents a high speed ROM-less direct digital frequency synthesizer （DDFS） which has a phase resolution of 32 bits and a magnitude resolution of 10 bits. A 10-bit nonlinear segmented DAC is used in place of the ROM look-up table for phase-to-sine amplitude conversion and the linear DAC in a conventional DDFS. The design procedure for implementing the nonlinear DAC is presented. To ensure high speed, current mode logic （CML） is used. The chip is implemented in Chartered 0.35μm COMS technology with active area of 2.0 × 2.5 mm^2 and total power consumption of 400 mW at a single 3.3 V supply voltage. The maximum operating frequency is 850 MHz at room temperature and 1.0 GHz at 0℃.
