A Hybrid Integrated and Low-Cost Multi-Chip Broadband Doherty Power Amplifier Module for 5G Massive MIMO Application

In this paper,a hybrid integrated broadband Doherty power amplifier(DPA)based on a multi-chip module(MCM),whose active devices are fabricated using the gallium nitride(GaN)process and whose passive circuits are fabricated using the gallium arsenide(GaAs)integrated passive device(IPD)process,is proposed for 5G massive multiple-input multiple-output(MIMO)application.An inverted DPA structure with a low-Q output network is proposed to achieve better bandwidth performance,and a single-driver architecture is adopted for a chip with high gain and small area.The proposed DPA has a bandwidth of 4.4-5.0 GHz that can achieve a saturation of more than 45.0 dBm.The gain compression from 37 dBm to saturation power is less than 4 dB,and the average power-added efficiency(PAE)is 36.3%with an 8.5 dB peak-to-average power ratio(PAPR)in 4.5-5.0 GHz.The measured adjacent channel power ratio(ACPR)is better than50 dBc after digital predistortion(DPD),exhibiting satisfactory linearity.

Broadband Dual-Input Doherty Power Amplifier Design Based on a Simple Adaptive Power Dividing Ratio Function

In this paper,a simple adaptive power dividing function for the design of a dual-input Doherty power amplifier(DPA)is presented.In the presented approaches,the signal separation function(SSF)at different frequency points can be characterized by a polynomial.And in the practical test,the coefficients of SSF can be determined by measuring a small number of data points of input power.Same as other dualinput DPAs,the proposed approach can also achieve high output power and back-off efficiency in a broadband operation band by adjusting the power distribution ratio flexibly.Finally,a 1.5-2.5 GHz highefficiency dual-input Doherty power amplifier is implemented according to this approach.The test results show that the peak power is 48.6-49.7d Bm,and the 6-d B back-off efficiency is 51.0-67.0%,and the saturation efficiency is 52.4-74.6%.The digital predistortion correction is carried out at the frequency points of 1.8/2.1GHz,and the adjacent channel power ratio is lower than-54.5d Bc.Simulation and experiment results can verify the effectiveness and correctness of the proposed method.

Design Technologies for Silicon-Based High-Efficiency RF Power Amplifiers:A Brief Overview

This paper presents a brief overview of several promising design technologies for high efficiency silicon-based radio frequency （RF） power amplifiers （PAs） as well as the use of these technologies in mobile broadband wireless communications. Four important aspects of PA design are addressed in this paper. First, we look at class-E PA design equations and provide an example of a class-E PA that achieves efficiency of 65-70% at 2.4 GHz. Then, we discuss state-of-the-art envelope tracking （ET） design for monolithic wideband RF mobile transmitter applications. A brief overview of Doherty PA design for the next-generation wireless handset applications is then given. Towards the end of the paper, we discuss an inherently broadband and highly efficient class-J PA design targeting future multi-band multi-standard wireless communication protocols.

A novel method for extending the output power back-off range of an asymmetrical Doherty power amplifier

A novel method is proposed to extend the output power back-off(OPBO)range of the Doherty power amplifier(DPA).This study reveals that the OPBO range of the DPA can be extended by tuning the output impedance of the peaking stage away from infinity and changing the phase delay of the output matching network of the carrier power amplifier.Based on this theory,a large-OPBO-range high-efficiency asymmetrical DPA working band from 1.55 to 2.2 GHz(35%relative bandwidth)is designed to verify the proposed method.Experimental results show that the DPA operates from 1.6 to 2.1 GHz.The range of the measured efficiency is 42.2%–52.1%in the OPBO state and 47%–62.7%in the saturation state.The OPBO range is 11.1–13.2 dB.

A broadband high-efficiency Doherty power amplifier using symmetrical devices

This paper proposes a method for broadband and high-efficiency amplification of Doherty power amplifier （DPA） using symmetric devices. In order to achieve the perfect load modulation, the carrier amplifier output circuit total power length is designed to odd multiple of 90°, and the peak amplifier output total power length is designed to even multiple of 180°. The proposed method is demonstrated by designing a broadband high-efficiency DPA using identical 10-W packaged GaN HEMT devices. Measurement results show that over 51% drain effi- ciency is achieved at 6-dB back-off power, over the frequency band of 1.9-2.4 GHz.