In this work,two process-variation-tolerant schemes for a current-mode sense amplifier(CSA)of RRAM were proposed:(1)hybrid read reference generator(HRRG)that tracks process-voltage-temperature(PVT)variations and solve...In this work,two process-variation-tolerant schemes for a current-mode sense amplifier(CSA)of RRAM were proposed:(1)hybrid read reference generator(HRRG)that tracks process-voltage-temperature(PVT)variations and solve the nonlinear issue of the RRAM cells;(2)a two-stage offset-cancelled current sense amplifier(TSOCC-SA)with only two capacitors achieves a double sensing margin and a high tolerance of device mismatch.The simulation results in 28 nm CMOS technology show that the HRRG can provide a read reference that tracks PVT variations and solves the nonlinear issue of the RRAM cells.The proposed TSOCC-SA can tolerate over 64% device mismatch.展开更多
基金supported in part by the National Key R&D Program of China under Grant No.2019YFB2204800in part by the Major Scientific Research Project of Zhejiang Lab(Grant No.2019KC0AD02)+1 种基金in part by the National Natural Science Foundation of China under Grants 61904200the Strategic Priority Research Program of the Chinese Academy of Sciences under Grant No.XDB44000000。
文摘In this work,two process-variation-tolerant schemes for a current-mode sense amplifier(CSA)of RRAM were proposed:(1)hybrid read reference generator(HRRG)that tracks process-voltage-temperature(PVT)variations and solve the nonlinear issue of the RRAM cells;(2)a two-stage offset-cancelled current sense amplifier(TSOCC-SA)with only two capacitors achieves a double sensing margin and a high tolerance of device mismatch.The simulation results in 28 nm CMOS technology show that the HRRG can provide a read reference that tracks PVT variations and solves the nonlinear issue of the RRAM cells.The proposed TSOCC-SA can tolerate over 64% device mismatch.