Optimal Dynamic Voltage Restorer Using Water Cycle Optimization Algorithm

This paper proposes a low complexity control scheme for voltage control of a dynamic voltage restorer(DVR)in a three-phase system.The control scheme employs the fractional order,proportional-integral-derivative(FOPID)controller to improve on the DVR performance in order to enhance the power quality in terms of the response time,steady-state error and total harmonic distortion(THD).The result obtained was compared with fractional order,proportionalintegral(FOPI),proportional-integral-derivative(PID)and proportional-integral(PI)controllers in order to show the effectiveness of the proposed DVR control scheme.A water cycle optimization algorithm(WCA)was utilized to find the optimal set for all the controller gains.They were used to solve four power quality issues;balanced voltage sag,balanced voltage swell,unbalanced voltage sag,and unbalanced voltage swell.It showed that one set of controller gain obtained from the WCA could solve all the power quality issues while the others in the literature needed an individual set of optimal gain for each power quality problem.To prove the concept,the proposed DVR algorithm was simulated in the MATLAB/Simulink software and the results revealed that the four optimal controllers can compensate for all the power quality problems.A comparative analysis of the results in various aspects of their dynamic response and%THD was discussed and analyzed.It was found that PID controller yields the most rapid performance in terms of average response time while FOPID controller yields the best performance in term of average%steady-state error.FOPI controller was found to provide the lowest THD percentage in the average%THD.FOPID did not differ much in average response from the PID and average%THD from FOPI;however,FOPID provided the most outstanding average steady-state error.According to the CBMA curve,the dynamic responses of all controllers fall in the acceptable power quality area.The total harmonic distortion(THD)of the compensated load voltage from all the controllers were within the 8%limit in accordance to the IEEE std.519-2014.

Investigation of Interline Dynamic Voltage Restorer with Virtual Impedance Injection

The inter-line dynamic voltage restorer （IDVR） consists of several voltage source inverters connected to different independent distribution feeders with common dc bus. When one of the inverters compensates for voltage sag that appears in its feeder （voltage control mode）, the other inverters pump the required power into the dc bus （power control mode）. Each inverter will have both voltage and power controllers; only one controller is in use during the abnormal conditions according to its feeder state. The voltage controller uses one of the dynamic voltage restoration techniques. In this paper, the in-phase technique is applied and two types of loads are considered （constant impedance and three phase induction motor）. Since the voltage restoration process may need real power injection into the distribution system, the power controller injects this power via voltage injection. This voltage injection is simulated by voltage drop across series virtual impedance. A new scheme is proposed to select the impedance value. The impedance value is selected such that the power consumed by this impedance represents the required power to be transferred without perturbing the load voltage. The performance of this system is also studied during voltage swell. A scheme for operation of multi-feeder IDVR system is proposed in this paper. Simulation results substantiate the proposed concept.

Low-voltage ride-through capability improvement of Type-3 wind turbine through active disturbance rejection feedback control-based dynamic voltage restorer

Disconnections due to voltage drops in the grid cannot be permitted if wind turbines(WTs)contribute significantly to electricity pro-duction,as this increases the risk of production loss and destabilizes the grid.To mitigate the negative effects of these occurrences,WTs must be able to ride through the low-voltage conditions and inject reactive current to provide dynamic voltage support.This paper investigates the low-voltage ride-through(LVRT)capability enhancement of a Type-3 WT utilizing a dynamic voltage restorer(DVR).During the grid voltage drop,the DVR quickly injects a compensating voltage to keep the stator voltage constant.This paper proposes an active disturbance rejection control(ADRC)scheme to control the rotor-side,grid-side and DVR-side converters in a wind–DVR integrated network.The performance of the Type-3 WT with DVR topology is evaluated under various test conditions using MATLAB®/Simulink®.These simulation results are also compared with the experimental results for the LVRT capability performed on a WT emulator equipped with a crowbar and direct current(DC)chopper.The simulation results demonstrate a favourable transient and steady-state response of the Type-3 wind turbine quantities defined by the LVRT codes,as well as improved reactive power support under balanced fault conditions.Under the most severe voltage drop of 95%,the stator currents,rotor currents and DC bus voltage are 1.25 pu,1.40 pu and 1.09 UDC,respectively,conforming to the values of the LVRT codes.DVR controlled by the ADRC technique significantly increases the LVRT capabilities of a Type-3 doubly-fed induction generator-based WT under symmetrical voltage dip events.Although setting up ADRC controllers might be challenging,the proposed method has been shown to be extremely effective in reducing all kinds of internal and external disturbances.

Energy-saving Superconducting Magnetic Energy Storage(SMES)Based Interline DC Dynamic Voltage Restorer

The fast-response feature from a superconducting magnetic energy storage(SMES)device is favored for suppressing instantaneous voltage and power fluctuations,but the SMES coil is much more expensive than a conventional battery energy storage device.In order to improve the energy utilization rate and reduce the energy storage cost under multiple-line power distribution conditions,this paper investigates a new interline DC dynamic voltage restorer(IDC-DVR)scheme with one SMES coil shared among multiple compensating circuits.In this new concept,an improved current-voltage(I/V)chopper assembly,which has a series of input/output power ports,is introduced to connect the single SMES coil with multiple power lines,and thereby satisfy the independent energy exchange requirements of any line to be compensated.Specifically,if two or more power lines have simultaneous compensating demands,the SMES coil can be selectively controlled to compensate the preferable line according to the priority order of the line.The feasibility of the proposed scheme is technically verified to maintain the transient voltage stability in multiple-line voltage swell and sag cases caused by either output voltage fluctuations from external power sources or power demand fluctuations from local sensitive loads.The simulation results provide a technical basis to develop a cost-effective SMES-based IDC-DVR for use in various DC distribution networks.

Double-loop Control Structure Using Proportional Resonant and Sequence-decoupled Resonant Controllers in Static Coordinates for Dynamic Voltage Restorer

Among incidents on grids,the sag/swell voltage is considered as the most frequent incident.To solve this problem,custom power devices are used.In particular,the dynamic voltage restorer(DVR)is a modern and efficient customer device.DVRs are used to mitigate voltage sag/swells and harmonics on the load bus,thus protecting the sensitive loads.The DVR is a serial compensator that applies a voltage to the point of common coupling to maintain the voltage of sensitive load at the nominal value.To improve the performance of DVRs,in this study,the control strategy of the two-stage loop circuit is implemented.The external voltage control loop uses a sequence-decoupled resonant(SDR)controller,and the inner current-control loop uses the proportional resonant(PR)controller implemented in the stationary frameαβ.

Application of Dynamic Voltage Restorer in Fault Ride-Through of Grid-Connected Photovoltaic Storage System

Problems in power quality such as temporary drops in grid voltage and flickers have been caught attention with the increasing capacity of the new energy grid-connected systems, such as photovoltaic(PV) and photovoltaic storage. To solve these problems, a dynamic voltage restorer(DVR) for fault ride-through of photovoltaic energy storage systems is presented. We select the appropriate DVR topology and compensation strategy for PV energy storage systems which are used as energy supply equipment for DVR. It proves to be energy-saving and solves the instability of photovoltaic output effectively. The intelligent algorithm that optimized the controller parameter of dynamic voltage restorer is used and the effectiveness of the controller strategy proposed has been assessed by time-domain simulations in the MATLAB/Simulink platform.

Fuzzy Controlled Ultra-Capacitor Based DVR (UCAP-DVR) for Power Quality Enhancement

In recent years, a rapid decrease in the cost of various energy storage technologies and their integration into grid becomes a reality with the advent of smart grid. The Dynamic Voltage Restorer (DVR) is a custom power device that has an excellent dynamic capability used to provide voltage sag, swell compensation in distribution systems. Among the energy storage devices, Ultra-Capacitors (UCAP) have ideal characteristics such as high power and low energy density essential for the compensation of voltage sag and swell, which require high power for short interval of time. This paper presents an integration of rechargeable UCAP with DVR. This UCAP-DVR presents a modular, flexible system configuration that will have an active power capability and also provide deep, extended mitigation for power quality problems. The DVR is integrated into UCAP via bidirectional DC-DC converter which supports a rigid dc-link voltage for DVR and also helps in compensating temporary voltage sag and swell. FUZZY LOGIC Controller is used to enhance the performance of UCAP-DVR. The simulation model for the proposed system has been developed in MAT-LAB and the performance over conventional DVR is compared with the results obtained.

An optimized compensation strategy of DVR for micro-grid voltage sag

Introduction:This paper uses a dynamic voltage restorer(DVR)to improve the voltage quality from voltage sags.It is difficult to satisfy various of compensation quality and time of the voltage sag by using single compensation method.Furthermore,high-power consumption of the phase jump compensation increases the size and cost of a dynamic voltage restorer(DVR).Methods&Results:In order to improve the compensating efficiency of DVR,an optimized compensation strategy is proposed for voltage sag of micro-grid caused by interconnection and sensitive loads.The proposed compensation strategy increases the supporting time for long voltage sags.Discussion:Firstly,the power flow and the maximum compensation time of DVR are analyzed using three basic compensation strategies.Then,the phase jump is corrected by pre-sag compensation.And a quadratic transition curve,which involves the injected voltage phases of pre-sag strategy and minimum energy strategy,is used to transform pre-sag compensation to minimum energy compensation of DVR.Conclusions:The transition utilizes the storage system to reduce the rate of discharge.As a result,the proposed strategy increases the supporting time for long voltage sags.The analytical study shows that the presented method significantly increases compensation time of DVR.The simulation results performed by MATLAB/SIMULINK also confirm the effectiveness of the proposed method.

Optimum Control Scheme of Output Voltage Based on Cascaded H-bridge DVR

This study presents an optimum control scheme to maximize the output voltage level number of the cascaded Hbridge dynamic voltage restorer(CHB–DVR).The relationship between the modulation index and the output voltage level number is analyzed in detail.The compensation reference voltage value is adjusted with the voltage drop depth to obtain high-quality output voltage with an acceptable total harmonic distortion.Thus,the modulation index remains within a certain range and thus meets the requirements of the maximum level number technique(MLNT).In addition,an improvement method based on the MLNT is proposed to achieve minimum active power absorption from a direct current link of the CHB–DVR.The traditional in-phase compensation and optimum control strategies are implemented to analyze the output voltage quality for verifying the feasibility of the proposed approach.Simulation and experimental results show the effectiveness of the proposed control scheme.