Due to the very high demand for Internet data capacity from mobile and fixed customers as well as the saturation of conventional frequency bands by numerous services, many countries have opened the E band, for broadca...Due to the very high demand for Internet data capacity from mobile and fixed customers as well as the saturation of conventional frequency bands by numerous services, many countries have opened the E band, for broadcasting services. E-band involves the creation of a significant number of links in a given area. The present work addressed the problem that arises in the context of transmission is that of assigning the frequencies of this band to these multiple transmission links. The aim of this work is to study and plan the radio links of the 80 GHz frequency and to implement them in a tool in order to define an optimal distribution on the telecommunications network by guaranteeing maximum flow of data traffic while minimizing the interference. The contribution of this work is part of its unique subject: the planning of E-band frequencies for improving the quality of service of transmission in the network of telecommunications operators. Also, it intends to contribute to the resolution of unsatisfied situations of poor planning of E-band radio frequencies in telecommunications networks. With the aim of opening several opportunities for alternative high-speed data transport solutions, our work has helped prove that E-band transmission links are very efficient with capacities in the gigabyte range.展开更多
This paper presents an E-band frequency quadrupler in 40-nm CMOS technology.The circuit employs two push-push frequency doublers and two single-stage neutralized amplifiers.The pseudo-differential class-B biased casco...This paper presents an E-band frequency quadrupler in 40-nm CMOS technology.The circuit employs two push-push frequency doublers and two single-stage neutralized amplifiers.The pseudo-differential class-B biased cascode topo-logy is adopted for the frequency doubler,which improves the reverse isolation and the conversion gain.Neutralization tech-nique is applied to increase the stability and the power gain of the amplifiers simultaneously.The stacked transformers are used for single-ended-to-differential transformation as well as output bandpass filtering.The output bandpass filter enhances the 4th-harmonic output power,while rejecting the undesired harmonics,especially the 2nd harmonic.The core chip is 0.23 mm^(2)in size and consumes 34 mW.The measured 4th harmonic achieves a maximum output power of 1.7 dBm with a peak conversion gain of 3.4 dB at 76 GHz.The fundamental and 2nd-harmonic suppressions of over 45 and 20 dB are achieved for the spectrum from 74 to 82 GHz,respectively.展开更多
A layout and connection optimization for static frequency divider is presented. The layout optimization provides a new circle topology transistors placement and reasonable connection structure, which reduces the paras...A layout and connection optimization for static frequency divider is presented. The layout optimization provides a new circle topology transistors placement and reasonable connection structure, which reduces the parasitic effectively and enables self-oscillation frequency enhancement. Besides, bandwidth enhancement techniques based on a center-tap capacitor in input balun design and inductive peaking in latch design are adopted to improve further high frequency performance with low power consumption. As a proof of concept, design of a divide-by-2 static frequency divider in 0.13 μm SiGe BiCMOS technology is reported. With single-ended input clock signal, the divider is measured to be operated from 40 to 90 GHz. Phase noise measurements of a 90 GHz input clock signal indicate ideal behavior with no measurable noise contribution from the divider. The divider followed by a buffer that can deliver more than-10 dBm output power, which is sufficient to drive succeeding stage. To the author's knowledge, the divider exhibits a competitive power dissipation and the highest FOM among silicon based frequency dividers that operating higher than 70 GHz.展开更多
A home-made low loss Bi/P co-doped silica fiber was fabricated using the modified chemical vapor deposition(MCVD)technique combined with the solution doping method,where the background loss at 1550 nm was as low as 17...A home-made low loss Bi/P co-doped silica fiber was fabricated using the modified chemical vapor deposition(MCVD)technique combined with the solution doping method,where the background loss at 1550 nm was as low as 17 dB/km.We demonstrated for the first time,to the best of our knowledge,an all-fiber amplifier using the home-made Bi/P co-doped fiber achieving broadband amplification in the E-band.The amplifying performance was evaluated and optimized with different pumping patterns and fiber length.A maximum net gain at 1355 nm close to 20 dB and a minimum noise figure of 4.6 dB were obtained for the first time,to the best of our knowledge,using two 1240 nm laser diodes under bidirectional pumping with the input pump and signal powers of 870 mW and−30 dBm,respectively.展开更多
An E-band high speed power detector MMIC using 0.1 μm pHEMT technology has been designed, manufactured and experimentally characterized. By employing a 4-way quadrature structure for phase cancellation, the first, se...An E-band high speed power detector MMIC using 0.1 μm pHEMT technology has been designed, manufactured and experimentally characterized. By employing a 4-way quadrature structure for phase cancellation, the first, second and third harmonics can be suppressed and the ripple at the output is minimized. Compared to conventional topology with a low pass filter, a short response time and high speed performance of demodulation can be reached. Simulated results indicate that the detector is capable of demodulating an on-off keying signal at a data rate up to 5 Gbps. The fabricated chip occupies 1× 1.5 mm2 and the on-wafer measurement shows a return loss of less than -15 dB, responsivity better than 700 mV/mW and dynamic range of more than 25 dB over 70 to 90 GHz.展开更多
Test results for a 10-Gbps prototype demonstrator working at 71~76 GHz frequency band with a 2-bit/s/Hz spectral efficiency are reported.To overcome the speed limitation of the commercial DA/ADs,a two-channel analog I...Test results for a 10-Gbps prototype demonstrator working at 71~76 GHz frequency band with a 2-bit/s/Hz spectral efficiency are reported.To overcome the speed limitation of the commercial DA/ADs,a two-channel analog IF multiplexing and demultiplexing topology is adopted as a trade-off between cost and spectrum efficiency.The same approach is also used to achieve up to 20 Gbps with a full 10-GHz bandwidth of the allocated commercial bands(71~76 GHz and 81~86 GHz).展开更多
文摘Due to the very high demand for Internet data capacity from mobile and fixed customers as well as the saturation of conventional frequency bands by numerous services, many countries have opened the E band, for broadcasting services. E-band involves the creation of a significant number of links in a given area. The present work addressed the problem that arises in the context of transmission is that of assigning the frequencies of this band to these multiple transmission links. The aim of this work is to study and plan the radio links of the 80 GHz frequency and to implement them in a tool in order to define an optimal distribution on the telecommunications network by guaranteeing maximum flow of data traffic while minimizing the interference. The contribution of this work is part of its unique subject: the planning of E-band frequencies for improving the quality of service of transmission in the network of telecommunications operators. Also, it intends to contribute to the resolution of unsatisfied situations of poor planning of E-band radio frequencies in telecommunications networks. With the aim of opening several opportunities for alternative high-speed data transport solutions, our work has helped prove that E-band transmission links are very efficient with capacities in the gigabyte range.
基金the National Key Research,Development Program of China under Grant 2018YFB1802100the Major Key Project of PCL(PCL2021A01-2).
文摘This paper presents an E-band frequency quadrupler in 40-nm CMOS technology.The circuit employs two push-push frequency doublers and two single-stage neutralized amplifiers.The pseudo-differential class-B biased cascode topo-logy is adopted for the frequency doubler,which improves the reverse isolation and the conversion gain.Neutralization tech-nique is applied to increase the stability and the power gain of the amplifiers simultaneously.The stacked transformers are used for single-ended-to-differential transformation as well as output bandpass filtering.The output bandpass filter enhances the 4th-harmonic output power,while rejecting the undesired harmonics,especially the 2nd harmonic.The core chip is 0.23 mm^(2)in size and consumes 34 mW.The measured 4th harmonic achieves a maximum output power of 1.7 dBm with a peak conversion gain of 3.4 dB at 76 GHz.The fundamental and 2nd-harmonic suppressions of over 45 and 20 dB are achieved for the spectrum from 74 to 82 GHz,respectively.
基金supported by National Natural Science Foundation of China under Grant 61701114the National Science and Technology Major Project under Grant 2017ZX03001020the Scientific Research Foundation of Graduate School of Southeast University (Grant No. YBJJ1811)
文摘A layout and connection optimization for static frequency divider is presented. The layout optimization provides a new circle topology transistors placement and reasonable connection structure, which reduces the parasitic effectively and enables self-oscillation frequency enhancement. Besides, bandwidth enhancement techniques based on a center-tap capacitor in input balun design and inductive peaking in latch design are adopted to improve further high frequency performance with low power consumption. As a proof of concept, design of a divide-by-2 static frequency divider in 0.13 μm SiGe BiCMOS technology is reported. With single-ended input clock signal, the divider is measured to be operated from 40 to 90 GHz. Phase noise measurements of a 90 GHz input clock signal indicate ideal behavior with no measurable noise contribution from the divider. The divider followed by a buffer that can deliver more than-10 dBm output power, which is sufficient to drive succeeding stage. To the author's knowledge, the divider exhibits a competitive power dissipation and the highest FOM among silicon based frequency dividers that operating higher than 70 GHz.
基金supported by the National Key R&D Program of China(No.2020YFB1805902).
文摘A home-made low loss Bi/P co-doped silica fiber was fabricated using the modified chemical vapor deposition(MCVD)technique combined with the solution doping method,where the background loss at 1550 nm was as low as 17 dB/km.We demonstrated for the first time,to the best of our knowledge,an all-fiber amplifier using the home-made Bi/P co-doped fiber achieving broadband amplification in the E-band.The amplifying performance was evaluated and optimized with different pumping patterns and fiber length.A maximum net gain at 1355 nm close to 20 dB and a minimum noise figure of 4.6 dB were obtained for the first time,to the best of our knowledge,using two 1240 nm laser diodes under bidirectional pumping with the input pump and signal powers of 870 mW and−30 dBm,respectively.
基金supported by the National High Technology Research and Development Program of China(No.2015AA01A704)
文摘An E-band high speed power detector MMIC using 0.1 μm pHEMT technology has been designed, manufactured and experimentally characterized. By employing a 4-way quadrature structure for phase cancellation, the first, second and third harmonics can be suppressed and the ripple at the output is minimized. Compared to conventional topology with a low pass filter, a short response time and high speed performance of demodulation can be reached. Simulated results indicate that the detector is capable of demodulating an on-off keying signal at a data rate up to 5 Gbps. The fabricated chip occupies 1× 1.5 mm2 and the on-wafer measurement shows a return loss of less than -15 dB, responsivity better than 700 mV/mW and dynamic range of more than 25 dB over 70 to 90 GHz.
基金supported by The National High Technology Research and Development Program of China(No.2015AA01A704)The National Natural Science Foundation of China(No.61302053).
文摘Test results for a 10-Gbps prototype demonstrator working at 71~76 GHz frequency band with a 2-bit/s/Hz spectral efficiency are reported.To overcome the speed limitation of the commercial DA/ADs,a two-channel analog IF multiplexing and demultiplexing topology is adopted as a trade-off between cost and spectrum efficiency.The same approach is also used to achieve up to 20 Gbps with a full 10-GHz bandwidth of the allocated commercial bands(71~76 GHz and 81~86 GHz).
