Power electronic devices are of great importance in modern society.After decades of development,Si power devices have approached their material limits with only incremental improvements and large conversion losses.As ...Power electronic devices are of great importance in modern society.After decades of development,Si power devices have approached their material limits with only incremental improvements and large conversion losses.As the demand for electronic components with high efficiency dramatically increasing,new materials are needed for power device fabrication.Betaphase gallium oxide,an ultra-wide bandgap semiconductor,has been considered as a promising candidate,and variousβ-Ga_(2)O_(3)power devices with high breakdown voltages have been demonstrated.However,the realization of enhancement-mode(E-mode)β-Ga_(2)O_(3)field-effect transistors(FETs)is still challenging,which is a critical problem for a myriad of power electronic applications.Recently,researchers have made some progress on E-modeβ-Ga_(2)O_(3)FETs via various methods,and several novel structures have been fabricated.This article gives a review of the material growth,devices and properties of these E-modeβ-Ga_(2)O_(3)FETs.The key challenges and future directions in E-modeβ-Ga_(2)O_(3)FETs are also discussed.展开更多
A NiO/β-Ga_(2)O_(3) heterojunction-gate field effect transistor(HJ-FET)is fabricated and it_(s)instability mechanisms are exper-imentally investigated under different gate stress voltage(V_(G,s))and stress times(t_(s...A NiO/β-Ga_(2)O_(3) heterojunction-gate field effect transistor(HJ-FET)is fabricated and it_(s)instability mechanisms are exper-imentally investigated under different gate stress voltage(V_(G,s))and stress times(t_(s)).Two different degradation mechanisms of the devices under negative bias stress(NBS)are identified.At low V_(G,s)for a short t_(s),NiO bulk traps trapping/de-trapping elec-trons are responsible for decrease/recovery of the leakage current,respectively.At higher V_(G,s)or long t_(s),the device transfer char-acteristic curves and threshold voltage(V_(TH))are almost permanently negatively shifted.This is because the interface dipoles are almost permanently ionized and neutralize the ionized charges in the space charge region(SCR)across the heterojunction inter-face,resulting in a narrowing SCR.This provides an important theoretical guide to study the reliability of NiO/β-Ga_(2)O_(3) hetero-junction devices in power electronic applications.展开更多
This paper reviews the original achievements and advances regarding the field effect transistor(FET) fabricated from one of the most studied transition metal dichalcogenides: two-dimensional Mo S2. Not like graphene, ...This paper reviews the original achievements and advances regarding the field effect transistor(FET) fabricated from one of the most studied transition metal dichalcogenides: two-dimensional Mo S2. Not like graphene, which is highlighted by a gapless Dirac cone band structure, Monolayer Mo S2 is featured with a 1.9 e V gapped direct energy band thus facilitates convenient electronic and/or optoelectronic modulation of its physical properties in FET structure. Indeed,many Mo S2 devices based on FET architecture such as phototransistors, memory devices, and sensors have been studied and extraordinary properties such as excellent mobility, ON/OFF ratio, and sensitivity of these devices have been exhibited. However, further developments in FET device applications depend a lot on if novel physics would be involved in them. In this review, an overview on advances and developments in the Mo S2-based FETs are presented. Engineering of Mo S2-based FETs will be discussed in details for understanding contact physics, formation of gate dielectric, and doping strategies. Also reported are demonstrations of device behaviors such as low-frequency noise and photoresponse in Mo S2-based FETs, which is crucial for developing electronic and optoelectronic devices.展开更多
In this paper, we propose multi-fin FET design techniques targeted for RF applications. Overlap and underlap design configuration in a base FinFET are compared first and then multi-fin device (consisting of transistor...In this paper, we propose multi-fin FET design techniques targeted for RF applications. Overlap and underlap design configuration in a base FinFET are compared first and then multi-fin device (consisting of transistor unit up to 50) is studied to develop design limitations and to evaluate their effects on the device performance. We have also investigated the impact of the number of fins (up to 50) in multi-fin structure and resulting RF parameters. Our results show that as the number of fin increases, underlap design compromises RF performance and short channel effects. The results provide technical understanding that is necessary to realize new opportunities for RF and analog mixed-signal design with nanoscale FinFETs.展开更多
二维半导体过渡金属二硫属化物(transition metal dichalcogenide,TMD)具有独特的电学、光学和力学性能,在数字电路、光伏器件和能量存储等多个领域中具有巨大的应用潜力。通过表面掺杂控制TMD的电学性能为实现灵敏传感提供了有效的方...二维半导体过渡金属二硫属化物(transition metal dichalcogenide,TMD)具有独特的电学、光学和力学性能,在数字电路、光伏器件和能量存储等多个领域中具有巨大的应用潜力。通过表面掺杂控制TMD的电学性能为实现灵敏传感提供了有效的方法。本文开展了氧等离子体对二硫化钼(MoS_(2))掺杂特性的研究。首先,测试了MoS_(2)场效应晶体管(field-effect transistor,FET)的输运特性,发现氧等离子体处理对FET具有p型掺杂作用。随后,通过拉曼光谱研究了掺杂机制的成因,并证实了沟道表面类MoO_(3)缺陷的形成。最后,研究了经等离子体处理的晶体管的湿度传感特性,由于氧等离子体处理使得沟道对水分子的吸收中心增加,在潮湿环境下晶体管具有十分灵敏的响应特性,源漏电流值变化了约54%。这项工作不仅提供了一种调控TMD电学性能的简单方法,也展示了低维材料化学传感器的发展潜力。展开更多
A physically based analytical model for surface potential and threshold voltage including the fringing gate capacitances in cylindrical surround gate(CSG) MOSFETs has been developed.Based on this a subthreshold drai...A physically based analytical model for surface potential and threshold voltage including the fringing gate capacitances in cylindrical surround gate(CSG) MOSFETs has been developed.Based on this a subthreshold drain current model has also been derived.This model first computes the charge induced in the drain/source region due to the fringing capacitances and considers an effective charge distribution in the cylindrically extended source/drain region for the development of a simple and compact model.The fringing gate capacitances taken into account are outer fringe capacitance,inner fringe capacitance,overlap capacitance,and sidewall capacitance.The model has been verified with the data extracted from 3D TCAD simulations of CSG MOSFETs and was found to be working satisfactorily.展开更多
In this paper,RF performance analysis of In As-based double gate(DG)tunnel field effect transistors(TFETs)is investigated in both qualitative and quantitative fashion.This investigation is carried out by varying t...In this paper,RF performance analysis of In As-based double gate(DG)tunnel field effect transistors(TFETs)is investigated in both qualitative and quantitative fashion.This investigation is carried out by varying the geometrical and doping parameters of TFETs to extract various RF parameters,unity gain cut-off frequency(f_t),maximum oscillation frequency(f_(max)),intrinsic gain and admittance(Y)parameters.An asymmetric gate oxide is introduced in the gate-drain overlap and compared with that of DG TFETs.Higher ON-current(ION)of about 0.2 mA and less leakage current(IOFF)of 29 f A is achieved for DG TFET with gate-drain overlap.Due to increase in transconductance(g_m),higher ft and intrinsic gain is attained for DG TFET with gate-drain overlap.Higher f_(max) of 985 GHz is obtained for drain doping of 5×10^(17)cm^(-3) because of the reduced gate-drain capacitance(C_(gd))with DG TFET with gate-drain overlap.In terms of Y-parameters,gate oxide thickness variation offers better performance due to the reduced values of Cgd.A second order numerical polynomial model is generated for all the RF responses as a function of geometrical and doping parameters.The simulation results are compared with this numerical model where the predicted values match with the simulated values.展开更多
The impact of process induced variation on the response of SOI Fin FET to heavy ion irradiation is studied through 3-D TCAD simulation for the first time. When Fin FET biased at OFF state configuration(Vgs D0, Vds DV...The impact of process induced variation on the response of SOI Fin FET to heavy ion irradiation is studied through 3-D TCAD simulation for the first time. When Fin FET biased at OFF state configuration(Vgs D0, Vds DVdd/ is struck by a heavy ion, the drain collects ionizing charges under the electric field and a current pulse(single event transient, SET) is consequently formed. The results reveal that with the presence of line-edge roughness(LER), which is one of the major variation sources in nano-scale Fin FETs, the device-to-device variation in terms of SET is observed. In this study, three types of LER are considered: type A has symmetric fin edges, type B has irrelevant fin edges and type C has parallel fin edges. The results show that type A devices have the largest SET variation while type C devices have the smallest variation. Further, the impact of the two main LER parameters,correlation length and root mean square amplitude, on SET variation is discussed as well. The results indicate that variation may be a concern in radiation effects with the down scaling of feature size.展开更多
The variations of single event transient(SET)pulse width of high-LET heavy ion irradiation in 16-nm-thick bulk silicon fin field-effect transistor(Fin FET)inverter chains with different driven strengths are measured a...The variations of single event transient(SET)pulse width of high-LET heavy ion irradiation in 16-nm-thick bulk silicon fin field-effect transistor(Fin FET)inverter chains with different driven strengths are measured at different temperatures.Three-dimensional(3D)technology computer-aided design simulations are carried out to study the SET pulse width and saturation current varying with temperature.Experimental and simulation results indicate that the increase in temperature will enhance the parasitic bipolar effect of bulk Fin FET technology,resulting in the increase of SET pulse width.On the other hand,the increase of inverter driven strength will change the layout topology,which has a complex influence on the SET temperature effects of Fin FET inverter chains.The experimental and simulation results show that the device with the strongest driven strength has the least dependence on temperature.展开更多
This paper proposed an innovative teaching approach based on finite element technique(FET)to improve the understanding of material mechanics.A teaching experiment was conducted using pure bending deformation of a beam...This paper proposed an innovative teaching approach based on finite element technique(FET)to improve the understanding of material mechanics.A teaching experiment was conducted using pure bending deformation of a beam as an example,and the deformation and stress distribution of the beam were analyzed using FET.The results showed that using color stress nephograms and color U nephograms can improve students’learning outcomes in mechanics classroom.The high levels of satisfaction and interest in incorporating new techniques into the classroom suggest that there is a need to explore and develop innovative teaching methods in mechanics and related fields.This approach may inspire educators to develop more effective ways of teaching material mechanics,and our research can contribute to the advancement of mechanics education.展开更多
基金supported in part by the National Basic Research Program of China(Grant No.2021YFB3600202)Key Laboratory Construction Project of Nanchang(Grant No.2020-NCZDSY-008)the Suzhou Science and Technology Foundation(Grant No.SYG202027)。
文摘Power electronic devices are of great importance in modern society.After decades of development,Si power devices have approached their material limits with only incremental improvements and large conversion losses.As the demand for electronic components with high efficiency dramatically increasing,new materials are needed for power device fabrication.Betaphase gallium oxide,an ultra-wide bandgap semiconductor,has been considered as a promising candidate,and variousβ-Ga_(2)O_(3)power devices with high breakdown voltages have been demonstrated.However,the realization of enhancement-mode(E-mode)β-Ga_(2)O_(3)field-effect transistors(FETs)is still challenging,which is a critical problem for a myriad of power electronic applications.Recently,researchers have made some progress on E-modeβ-Ga_(2)O_(3)FETs via various methods,and several novel structures have been fabricated.This article gives a review of the material growth,devices and properties of these E-modeβ-Ga_(2)O_(3)FETs.The key challenges and future directions in E-modeβ-Ga_(2)O_(3)FETs are also discussed.
基金supported by the Fundamental Strengthening Program Key Basic Research Project(Grant No.2021-173ZD-057).
文摘A NiO/β-Ga_(2)O_(3) heterojunction-gate field effect transistor(HJ-FET)is fabricated and it_(s)instability mechanisms are exper-imentally investigated under different gate stress voltage(V_(G,s))and stress times(t_(s)).Two different degradation mechanisms of the devices under negative bias stress(NBS)are identified.At low V_(G,s)for a short t_(s),NiO bulk traps trapping/de-trapping elec-trons are responsible for decrease/recovery of the leakage current,respectively.At higher V_(G,s)or long t_(s),the device transfer char-acteristic curves and threshold voltage(V_(TH))are almost permanently negatively shifted.This is because the interface dipoles are almost permanently ionized and neutralize the ionized charges in the space charge region(SCR)across the heterojunction inter-face,resulting in a narrowing SCR.This provides an important theoretical guide to study the reliability of NiO/β-Ga_(2)O_(3) hetero-junction devices in power electronic applications.
文摘This paper reviews the original achievements and advances regarding the field effect transistor(FET) fabricated from one of the most studied transition metal dichalcogenides: two-dimensional Mo S2. Not like graphene, which is highlighted by a gapless Dirac cone band structure, Monolayer Mo S2 is featured with a 1.9 e V gapped direct energy band thus facilitates convenient electronic and/or optoelectronic modulation of its physical properties in FET structure. Indeed,many Mo S2 devices based on FET architecture such as phototransistors, memory devices, and sensors have been studied and extraordinary properties such as excellent mobility, ON/OFF ratio, and sensitivity of these devices have been exhibited. However, further developments in FET device applications depend a lot on if novel physics would be involved in them. In this review, an overview on advances and developments in the Mo S2-based FETs are presented. Engineering of Mo S2-based FETs will be discussed in details for understanding contact physics, formation of gate dielectric, and doping strategies. Also reported are demonstrations of device behaviors such as low-frequency noise and photoresponse in Mo S2-based FETs, which is crucial for developing electronic and optoelectronic devices.
文摘In this paper, we propose multi-fin FET design techniques targeted for RF applications. Overlap and underlap design configuration in a base FinFET are compared first and then multi-fin device (consisting of transistor unit up to 50) is studied to develop design limitations and to evaluate their effects on the device performance. We have also investigated the impact of the number of fins (up to 50) in multi-fin structure and resulting RF parameters. Our results show that as the number of fin increases, underlap design compromises RF performance and short channel effects. The results provide technical understanding that is necessary to realize new opportunities for RF and analog mixed-signal design with nanoscale FinFETs.
基金National Natural Science Foundation of China(No.62005042)。
文摘二维半导体过渡金属二硫属化物(transition metal dichalcogenide,TMD)具有独特的电学、光学和力学性能,在数字电路、光伏器件和能量存储等多个领域中具有巨大的应用潜力。通过表面掺杂控制TMD的电学性能为实现灵敏传感提供了有效的方法。本文开展了氧等离子体对二硫化钼(MoS_(2))掺杂特性的研究。首先,测试了MoS_(2)场效应晶体管(field-effect transistor,FET)的输运特性,发现氧等离子体处理对FET具有p型掺杂作用。随后,通过拉曼光谱研究了掺杂机制的成因,并证实了沟道表面类MoO_(3)缺陷的形成。最后,研究了经等离子体处理的晶体管的湿度传感特性,由于氧等离子体处理使得沟道对水分子的吸收中心增加,在潮湿环境下晶体管具有十分灵敏的响应特性,源漏电流值变化了约54%。这项工作不仅提供了一种调控TMD电学性能的简单方法,也展示了低维材料化学传感器的发展潜力。
基金Project supported by the AICTE(No.8023/BOR/RID/RPS-253/2008-09)the SMDP-Ⅱ Project(No.21(1)/2005-VCND) by MCIT, DeiTy,Govt of India
文摘A physically based analytical model for surface potential and threshold voltage including the fringing gate capacitances in cylindrical surround gate(CSG) MOSFETs has been developed.Based on this a subthreshold drain current model has also been derived.This model first computes the charge induced in the drain/source region due to the fringing capacitances and considers an effective charge distribution in the cylindrically extended source/drain region for the development of a simple and compact model.The fringing gate capacitances taken into account are outer fringe capacitance,inner fringe capacitance,overlap capacitance,and sidewall capacitance.The model has been verified with the data extracted from 3D TCAD simulations of CSG MOSFETs and was found to be working satisfactorily.
基金Project supported by the Department of Science and Technology,Government of India under SERB Scheme(No.SERB/F/2660)
文摘In this paper,RF performance analysis of In As-based double gate(DG)tunnel field effect transistors(TFETs)is investigated in both qualitative and quantitative fashion.This investigation is carried out by varying the geometrical and doping parameters of TFETs to extract various RF parameters,unity gain cut-off frequency(f_t),maximum oscillation frequency(f_(max)),intrinsic gain and admittance(Y)parameters.An asymmetric gate oxide is introduced in the gate-drain overlap and compared with that of DG TFETs.Higher ON-current(ION)of about 0.2 mA and less leakage current(IOFF)of 29 f A is achieved for DG TFET with gate-drain overlap.Due to increase in transconductance(g_m),higher ft and intrinsic gain is attained for DG TFET with gate-drain overlap.Higher f_(max) of 985 GHz is obtained for drain doping of 5×10^(17)cm^(-3) because of the reduced gate-drain capacitance(C_(gd))with DG TFET with gate-drain overlap.In terms of Y-parameters,gate oxide thickness variation offers better performance due to the reduced values of Cgd.A second order numerical polynomial model is generated for all the RF responses as a function of geometrical and doping parameters.The simulation results are compared with this numerical model where the predicted values match with the simulated values.
文摘The impact of process induced variation on the response of SOI Fin FET to heavy ion irradiation is studied through 3-D TCAD simulation for the first time. When Fin FET biased at OFF state configuration(Vgs D0, Vds DVdd/ is struck by a heavy ion, the drain collects ionizing charges under the electric field and a current pulse(single event transient, SET) is consequently formed. The results reveal that with the presence of line-edge roughness(LER), which is one of the major variation sources in nano-scale Fin FETs, the device-to-device variation in terms of SET is observed. In this study, three types of LER are considered: type A has symmetric fin edges, type B has irrelevant fin edges and type C has parallel fin edges. The results show that type A devices have the largest SET variation while type C devices have the smallest variation. Further, the impact of the two main LER parameters,correlation length and root mean square amplitude, on SET variation is discussed as well. The results indicate that variation may be a concern in radiation effects with the down scaling of feature size.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.12035019,12105339,and62174180)the Opening Special Foundation of State Key Laboratory of Intense Pulsed Radiation Simulation and Effect,China(Grant No.SKLIPR2113)。
文摘The variations of single event transient(SET)pulse width of high-LET heavy ion irradiation in 16-nm-thick bulk silicon fin field-effect transistor(Fin FET)inverter chains with different driven strengths are measured at different temperatures.Three-dimensional(3D)technology computer-aided design simulations are carried out to study the SET pulse width and saturation current varying with temperature.Experimental and simulation results indicate that the increase in temperature will enhance the parasitic bipolar effect of bulk Fin FET technology,resulting in the increase of SET pulse width.On the other hand,the increase of inverter driven strength will change the layout topology,which has a complex influence on the SET temperature effects of Fin FET inverter chains.The experimental and simulation results show that the device with the strongest driven strength has the least dependence on temperature.
文摘This paper proposed an innovative teaching approach based on finite element technique(FET)to improve the understanding of material mechanics.A teaching experiment was conducted using pure bending deformation of a beam as an example,and the deformation and stress distribution of the beam were analyzed using FET.The results showed that using color stress nephograms and color U nephograms can improve students’learning outcomes in mechanics classroom.The high levels of satisfaction and interest in incorporating new techniques into the classroom suggest that there is a need to explore and develop innovative teaching methods in mechanics and related fields.This approach may inspire educators to develop more effective ways of teaching material mechanics,and our research can contribute to the advancement of mechanics education.