Forward/backward prediction solution for adaptive noisy FIR filtering

An important and hard problem in signal processing is the estimation of parameters in the presence of observation noise.In this paper, adaptive finite impulse response （FIR） filtering with noisy input-output data is considered and two developed bias compensation least squares （BCLS） methods are proposed.By introducing two auxiliary estimators, the forward output predictor and the backward output predictor are constructed respectively.By exploiting the statistical properties of the cross-correlation function between the least squares （LS） error and the forward/backward prediction error, the estimate of the input noise variance is obtained; the effect of the bias can thereafter be removed.Simulation results are presented to illustrate the good performances of the proposed algorithms.

Empirical mode decomposition using variable filtering with time scale calibrating

A novel and efficient method for decomposing a signal into a set of intrinsic mode functions （IMFs） and a trend is proposed. Unlike the original empirical mode decomposition （EMD）, which uses spline fits to extract variations from the signal by separating the local mean from the fluctuations in the decomposing process, this new method being proposed takes advantage of the theory of variable finite impulse response （FIR） filtering where filter coefficients and breakpoint frequencies can be adjusted to track any peak-to-peak time scale changes. The IMFs are results of a multiple variable frequency response FIR filtering when signals pass through the filters. Numerical examples validate that in contrast with the original EMD, the proposed method can fine-tune the frequency resolution and suppress the aliasing effectively.

FPGA-Based Efficient Programmable Polyphase FIR Filter

The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.)

Optimal design study of high order FIR digital filters based on neural network algorithm

An optimal design approach of high order FIR digital filter is developed based on the algorithm of neural networks with cosine basis function . The main idea is to minimize the sum of the square errors between the amplitude response of the desired FIR filter and that of the designed by training the weights of neural networks, then obtains the impulse response of FIR digital filter . The convergence theorem of the neural networks algorithm is presented and proved, and the optimal design method is introduced by designing four kinds of FIR digital filters , i.e., low-pass, high-pass, bandpass , and band-stop FIR digital filter. The results of the amplitude responses show that attenuation in stop-bands is more than 60 dB with no ripple and pulse existing in pass-bands, and cutoff frequency of passband and stop-band is easily controlled precisely .The presented optimal design approach of high order FIR digital filter is significantly effective.

Range-Only UWB SLAM for Indoor Robot Localization Employing Multi-Interval EFIR Rauch-Tung-Striebel Smoother

For improving the localization accuracy,a multi-interval extended finite impulse response(EFIR)-based Rauch-Tung-Striebel(R-T-S)smoother is proposed for the range-only ultra wide band(UWB)simultaneous localization and mapping(SLAM)for robot localization.In this mode,the EFIR R-T-S(ERTS)smoother employs EFIR filter as the forward filter and the R-T-S smoothing method to smooth the EFIR filter’s output.When the east or the north position is considered as stance,the ERTS is used to smooth the position directly.Moreover,the estimation of the UWB Reference Nodes’(RNs’)position is smoothed by the R-T-S smooth method in parallel.The test illustrates that the proposedmulti-interval ERTS smoothing for range-only UWB SLAMis able to provide accurate estimation.Compared with the EFIR filter,the proposed method improves the localization accuracy by about 25.35%and 40.66%in east and north directions,respectively.

Area and Speed Efficient Implementation of Symmetric FIR Digital Filter through Reduced Parallel LUT Decomposed DA Approach

This brief proposes an area and speed efficient implementation of symmetric finite impulse response (FIR) digital filter using reduced parallel look-up table (LUT) distributed arithmetic (DA) based approach. The complexity lying in the realization of FIR filter is dominated by the multiplier structure. This complexity grows further with filter order, which results in increased area, power, and reduced speed of operation. The speed of operation is improved over multiply-accumulate approach using multiplier less conventional DA based design and decomposed DA based design. Both the structure requires B clock cycles to get the filter output for the input width of B, which limits the speed of DA structure. This limitation is addressed using parallel LUTs, called high speed DA FIR, at the expense of additional hardware cost. With large number of taps, the number of LUTs and its size also becomes large. In the proposed method, by exploiting coefficient symmetry property, the number of LUTs in the decomposed DA form is reduced by a factor of about 2. This proposed approach is applied in high speed DA based FIR design, to obtain area and speed efficient structure. The proposed design offers around 40% less area and 53.98% less slice-delay product (SDP) than the high throughput DA based structure when it’s implemented over Xilinx Virtex-5 FPGA device-XC5VSX95T-1FF1136 for 16-tap symmetric FIR filter. The proposed design on the same FPGA device, supports up to 607 MHz input sampling frequency, and offers 60.5% more speed and 67.71% less SDP than the systolic DA based design.

An Efficient Method of N-D FIR Digital Filter Designs and Implementation

All efficient method of N-D FIR digital filter designs and implementation is presented in the peper.The most interesting aspects of the work in the paper are divided into three parts:First,an efficient transformation functions which have good properties are proposed.Second,the essential properties for spherically or hyperspherically symmetric filters are given.Finally,the most efficient implementatiou which exploits the structure inherent in the design is discussed.

Incorporation of Reduced Full Adder and Half Adder into Wallace Multiplier and Improved Carry-Save Adder for Digital FIR Filter

Improvement of digital FIR filter is vital in the field of Digital Signal Processing in order to reduce the area, delay and power. Multiplication and Accumulation (MAC) unit of Finite Impulse Response (FIR) filter has been designed using efficient multiplier and adder circuits for optimized APT (Area,Power and Timing) product. In this paper, the design of direct form FIR filter with efficient MAC unit has been presented. Initially, full adder and half adder structures are shrunk down by reducing number of gates. These compact full adder and half adder structures are incorporated into Wallace Multiplier and Improved Carry-Save Adder. The proposed 16-bit Carry-Save Adder has been improved by splitting into four parallel phases. Consequently the delay of enhanced Carry- Save Adder is reduced. Generation of carry output is performed using number of OR gates in a sequential manner. All these enhanced architectures are incorporated into the Digital FIR Filter to reduce the area, delay and power utilization.

High-Performance FIR Filter Implementation Using Anurupye Vedic Multiplier

In this, today’s world immeasurable analysis goes within the field of communication and signal processing applications. The FIR filter is mostly employed in filtering applications to enhance the quality of the signal. In any processor, the performance of the system is based on the speed of the multiplier unit involved in its operation. Since multiplier forms the indispensable building blocks of the FIR filter system. Its performance has contributed in determining the execution of the FIR filter system. Also, due to the tremendous development in the technology, many approaches such as an array, Vedic methods are made to speed up the multiplier computations. The problem in speed-up operation and resource utilization of hardware with all the conventional methods due to the critical path found in partial products has to be optimized using proposed method. This paper presents the implementation and execution of a FIR Filter design using Anurupye multiplier. Here the FIR filter is examined by using various multiplier algorithms such as Anurupye, Urdhava Tiryagbhyam, and array multipliers. The FIR filter is simulated for analyzing delay;area and power are meted out and lessened by utilizing proposed Anurupye multiplier. The FIR filter design utilizing proposed multiplier offers delay around 18.99 and only 4% of LUT slice utilization compared to existing methods. This architecture is coded in VHDL, simulated using the ModelSim and synthesized with Xilinx.

Adaptive Noise Cancellation Method Used for Wheel Speed Signal of Integrate ABS/ASR System

A novel adaptive noise cancellation method for wheel speed signal of the anti-lock braking system/ anti-slip regulation（ABS/ASR） control system is proposed. Based on the spectrum distribution of vehicle＇s wheel speed signal got from fast Fourier transform under various conditions, the high-pass filter is used to deal with original wheel speed signals sampled to get reference noise signal and the original wheel speed signals are used as adaptive filter＇s desired outputs. The difference between original signals and reference noise signals is used as the error signal for the adaptive FIR filter and also used as the whole adaptive noise cancellation system＇s final output. This method can obtain the noise signal on-line and is easy to use for. real control system, which is useful to improve the performance of integrate system ABS/ASR.

Design of twodimensional digital filters using neural networks

A new approach for the design of two-dimensional （2-D） linear phase FIR digital filters based on a new neural networks algorithm （NNA） is provided. A compact expression for the transfer function of a 2-D linear phase FIR filter is derived based on its frequency response characteristic, and the NNA, based on minimizing the square-error in the frequency-domain, is established according to the compact expression. To illustrate the stability of the NNA, the convergence theorem is presented and proved. Design examples are also given, and the results show that the ripple is considerably small in passband and stopband, and the NNA-based method is of powerful stability and requires quite little amount of computations.

New Wideband Beam-forming Method Used in Underwater Communication System

A novel wideband beam-forming structure with constant beam width based on complex coefficients (FIR) digital filters used in underwater acoustic communication is proposed. First,the received signals are compensated with integer sampling period by using delay line. Then their complex envelopes are calculated by using frequency shift method. Finally,the envelopes are weighted by using complex coefficients FIR digital filters whose coefficients are optimized. Simulation results show that,in the communication band,the maximum difference between the designed beam and desired beam is less than 0.3 dB when the ratio of communication band to carrier frequency is 0.85.

Generalized ionospheric dispersion simulation method for wideband satellite-ground-link radio systems

A generalized ionospheric dispersion simulation method is presented to verify and test wideband satellite-ground-link radio systems for dispersion robustness. In the method, ionospheric dispersive effects on wideband radio waves are modeled as an allpass nonlinear phase system, thus greatly decreasing the need for signal priori information. To accurately simulate the ionospheric dis- persion and reduce the implementation complexity, the system is decomposed into three new allpass subsystems： with a linear phase passing through zero frequency, a constant phase, and a nonlinear phase with zero-offset and quasi-parabolic form respectively. The three subsystems are implemented respectively by the combination of integer-interval delay and fractional delay filter, digital shifting phase and the complex-coefficient finite impulse response （ FIR ） filter. The ionospheric dispersion simulation can be achieved by cascading the three subsystems in a complex baseband and converting the frequency to a radio frequency. Simulation results show that the method has the ability to accu- rately simulate the ionospheric dispersion characteristics without knowing the signal priori informa- tion and has a low implementation complexity.

A CMOS wideband front-end chip using direct RF sampling mixer with embedded discrete-time filtering

A CMOS wideband front-end IC is demonstrated in this paper.It consists of a low noise transconductance amplifier（LNTA） and a direct RF sampling mixer（DSM） with embedded programmable discrete-time filtering.The LNTA has the features of 0.5-6 GHz wideband,wideband input matching and low noise.The embedded filter following the DSM operates in discrete-time charge domain,filtering the aliasing signals and interferences while controlling the IF bandwidth according to the clock frequency.The measured NF of the front-end was below 7 dB throughout the whole band from 0.5 to 6 GHz.It shows a conversion gain of 12.6 dB and IP_（1dB） of-7.5 dBm at 2.4 GHz.It occupies a chip area of 0.23 mm^2 and consumes 14 mA DC current.

Small-Space Microphone Array Fractional Delay Algorithm Based on FIR Filter for Cochlear Implant

Directional speech enhancement of signals from microphone arrays is an effective way to improve speech recognition for cochlear implant users. The strict implant size limitation results in a short distance between microphones. The fractional delay problem due to the short distance between microphones is solved by a maximal flat （Maxflat） finite impulse response （FIR） filter, using the Maxflat error criteria at a low frequency containing most of the speech information and energy. The fractional Maxfiat FIR filter approximates the ideal digital fractional filter at the magnitude response, phase response, and phase delay characteristics, and is also very low order. The results demonstrate that the Maxflat FIR filter accurately and effectively solves the fractional digital delay and is very suitable for real-time speech processing in practical cochlear implant products.

Neural Network Algorithm for Designing FIR Filters Utilizing Frequency-Response Masking Technique

This paper presents a new joint optimization method for the design of sharp linear-phase finite-impulse response （FIR） digital filters which are synthesized by using basic and multistage frequency-response-masking （FRM） techniques. The method is based on a batch back-propagation neural network algorithm with a variable learning rate mode. We propose the following two-step optimization technique in order to reduce the complexity. At the first step, an initial FRM filter is designed by alternately optimizing the subfilters. At the second step, this solution is then used as a start-up solution to further optimization. The further optimization problem is highly nonlinear with respect to the coefficients of all the subfilters. Therefore, it is decomposed into several linear neural network optimization problems. Some examples from the literature are given, and the results show that the proposed algorithm can design better FRM filters than several existing methods.

A New FIR Filter for State Estimation and Its Application

This paper proposes a new FIR （finite impulse response） filter under a least squares criterion using a forgetting factor. The proposed FIR filter does not require information of the noise covariances as well as the initial state, and has some inherent properties such as time-invariance, unbiasedness and deadbeat. The proposed FIR filter is represented in a batch form and then a recursive form as an alternative form. Prom discussions about the choice of a forgetting factor and a window length, it is shown that they can be considered as useful parameters to make the estimation performance of the proposed FIR filter as good as possible. It is shown that the proposed FIR filter can outperform the existing FIR filter with incorrect noise covariances via computer simulations. Finally, as a useful application, an image sequence stabilization problem is considered. Through this application, the FIR filtering based approach is shown to be superior to the Kalman filtering based approach.

Fault Detection Based on FIR Filters with Variable Discount Factors for Industrial Robot Drive Systems

To enhance dynamic tracking performance and anti-disturbance capacity of finite impulse response(FIR) filters, variable discount factors are introduced to the recursive least squares(RLS) algorithm. By employing improved FIR filters to conduct modelling of industrial robot drive systems, dynamic characteristics of the target systems are identified. Then the fault detection for a target system can be utilized by analyzing the coefficients of the FIR filter. Finally, an application of the fault detection scheme to a kind of brushless DC motor drive system is described. Compared with reference methods, the proposed scheme achieves effective fault detection and performs better in dynamic tracking and robustness according to the final simulation results.

Optimal Design of FIR Digital Filter Using Genetic Algorithm

A modified genetic algorithm is presented with its characteristics and principle. Finite Impulse Response (FIR) filter is designed by using the genetic algorithm. The advantages and potentials of the proposed ways are demonstrated by simulation results.

Design of a finite impulse response filter for rapid single-flux-quantum signal processors based on stochastic computing

Rapid‐Single‐Flux‐Quantum(RSFQ)circuit technology is well known for its low power consumption and latency,which enables digital signal processing up to tens of GHz.As a fundamental digital filter,the Finite Impulse Response(FIR)filter has wide applications in communication systems.A design of an FIR filter based on RSFQ circuit technology is proposed.However,the FIR filter consumes large amounts of adders and multipliers.Based on Stochastic Computing(SC)theory with which adder and multiplier are much simpler,the hardware cost of FIR filter is dramatically reduced.A novel stochastic number generator(SNG),a stochastic‐tobinary converter(SBC),and the FIR filter were designed and verified via logic simulation with a target frequency of 10 GHz.The results indicated the FIR filter performs correct operations.The proposed FIR filter consists of 2255 Josephson junctions(JJs)without wiring cells(i.e.,Josephson Transmission Lines(JTLs),Passive Transmission Lines(PTLs)),which is acceptable,making it possible to be used in RSFQ digital signal processors.