文摘随着高速数字系统的不断发展,迫切需要有效的高速数据总线能够与之实现最佳的匹配,从而发挥出高速系统本身所具有的卓越性能。FPDP II总线是在FPDP总线的基础上提出的,400MB/s的单向数据传输速度使其成为广泛应用于高速系统的通用总线协议。本文基于FPGA完成了FPDP II总线逻辑的设计和仿真,在自主研制的高速系统上应用Signal Tap II成功进行了测试。
基金Acknowledgements This work was supported by the National Natural Science Foundation of China (Grant No. 61178034), Zhejiang Provincial Natural Science Foundation of China (Grant No. Y1100268), and partially supported by Key Research Project of University of Zhejiang Province, China (Grant No. ZD2009006), and the Program for Innovative Research Team, Zhejiang Normal University, Jinhua, Zhejiang Province, China.