An FPGA-based real-time image processing system

This paper analyzes the current difficulties encountered in on-line inspection systems of strip surface quality, specifically relating to problems with real-time processing of huge amounts of data. To address this need, this paper describes an FPGA-based high-speed image processing module with both hardware and software aspects. Improving these two aspects together will help the system achieve real-time processing of massive image data, and simplifies the architecture of the strip surface quality on-line inspection system.

Real-time image processing and display in object size detection based on VC++

Real-time detection for object size has now become a hot topic in the testing field and image processing is the core algorithm. This paper focuses on the processing and display of the collected dynamic images to achieve a real-time image pro- cessing for the moving objects. Firstly, the median filtering, gain calibration, image segmentation, image binarization, cor- ner detection and edge fitting are employed to process the images of the moving objects to make the image close to the real object. Then, the processed images are simultaneously displayed on a real-time basis to make it easier to analyze, understand and identify them, and thus it reduces the computation complexity. Finally, human-computer interaction （HCI）-friendly in- terface based on VC ＋＋ is designed to accomplish the digital logic transform, image processing and real-time display of the objects. The experiment shows that the proposed algorithm and software design have better real-time performance and accu- racy which can meet the industrial needs.

A Flexible DSP-Based Network forReal-Time Image-Processing

This paper proposed a general purpose real-time image processing system based on a flexible DSP-based Network, which is implemented by a high bandwidth communication channel, links. The links is realized using FPGA and provides a bandwidth of 12. 8 Gbit/s. Using the links, The topologic of multi-DSP system can be changed online to meet the variabilities of the parallel algorithm of image processing. The system can be assembled with utmost tens of boards and maintain the high communication speed. Analysis of the system adaptivity to image processing is testified followed by actual results. Key words real-time image processing - multi-DSP - flexible - scalable - FPGA - links CLC number TP 303 Foundation item: Supported by the National Natural Science Foundation of China (60135020)Biography: MAO Hai-cen(1973-), male, Ph.D. candidate, research direction: artificial intelligence, expert system, pattern recognition and image processing

New multi-DSP parallel computing architecture for real-time image processing

The flexibility of traditional image processing system is limited because those system are designed for specific applications. In this paper, a new TMS320C64x-based multi-DSP parallel computing architecture is presented. It has many promising characteristics such as powerful computing capability, broad I/O bandwidth, topology flexibility, and expansibility. The parallel system performance is evaluated by practical experiment.

High performance reconfigurable hardware system for real-time image processing

A novel reconfigurable hardware system which uses both muhi-DSP and FPGA to attain high performance and real-time image processing are presented. The system structure and working principle of mainly processing multi-BSP board, extended multi-DSP board are analysed. The outstanding advantage is that the communication among different board components of this system is supported by high speed link ports ＆ serial ports for increasing the system performance and computational power. Then the implementation of embedded real-time operating systems （RTOS） by us is discussed in detail. In this system, we adopt two kinds of parallel structures controlled by RTOS for parallel processing of algorithms. The experimental results show that exploitive period of the system is short, and maintenance convenient. Thus it is suitable for real-time image processing and can get satisfactory effect of image recognition.

A Practical Study of Intelligent Image-Based Mobile Robot for Tracking Colored Objects

Object tracking is one of the major tasks for mobile robots in many real-world applications.Also,artificial intelligence and automatic control techniques play an important role in enhancing the performance of mobile robot navigation.In contrast to previous simulation studies,this paper presents a new intelligent mobile robot for accomplishing multi-tasks by tracking red-green-blue(RGB)colored objects in a real experimental field.Moreover,a practical smart controller is developed based on adaptive fuzzy logic and custom proportional-integral-derivative(PID)schemes to achieve accurate tracking results,considering robot command delay and tolerance errors.The design of developed controllers implies some motion rules to mimic the knowledge of experienced operators.Twelve scenarios of three colored object combinations have been successfully tested and evaluated by using the developed controlled image-based robot tracker.Classical PID control failed to handle some tracking scenarios in this study.The proposed adaptive fuzzy PID control achieved the best accurate results with the minimum average final error of 13.8 cm to reach the colored targets,while our designed custom PID control is efficient in saving both average time and traveling distance of 6.6 s and 14.3 cm,respectively.These promising results demonstrate the feasibility of applying our developed image-based robotic system in a colored object-tracking environment to reduce human workloads.

Application of TMS320C80 in Image Processing

To study the application of TMS320C80 in image processing, an image processing system was designed based on this device, and the task of real time image processing was well accomplished on the hardware platform. TMS320C80 architecture's high degree of on chip integration and software flexibility will make it widely used in image processing that requires high processing speeds.

Image processing algorithm acceleration using reconfigurable macro processor model

The concept and advantage of reconfigurable technology is introduced. A kind of processor architecture of re configurable macro processor (RMP) model based on FPGA array and DSP is put forward and has been implemented. Two image algorithms are developed: template-based automatic target recognition and zone labeling. One is estimating for motion direction in the infrared image background, another is line picking-up algorithm based on image zone labeling and phase grouping technique. It is a kind of 'hardware' function that can be called by the DSP in high-level algorithm. It is also a kind of hardware algorithm of the DSP. The results of experiments show the reconfigurable computing technology based on RMP is an ideal accelerating means to deal with the high-speed image processing tasks. High real time performance is obtained in our two applications on RMP.

Parallel Image Processing Technology of Surface Detection System

To improve image processing speed and detection precision of a surface detection system on a strip surface,based on the analysis of the characteristics of image data and image processing in detection system on the strip surface,the design of parallel image processing system and the methods of algorithm implementation have been studied. By using field programmable gate array(FPGA) as hardware platform of implementation and considering the characteristic of detection system on the strip surface,a parallel image processing system implemented by using multi IP kernel is designed. According to different computing tasks and the load balancing capability of parallel processing system,the system could set different calculating numbers of nodes to meet the system's demand and save the hardware cost.

基于FPGA的小目标识别分类系统的设计与实现

为了提高小目标识别和分类的实时性,同时降低识别系统的资源消耗,本文提出了一种简易、高效的现场可编程门阵列(Field Programmable Gate Array,FPGA)小目标识别分类系统。该系统首先通过图像预处理消除图像噪点,并采用并行计算提升系统实时性。然后将处理后的图像与模板进行匹配计算得到识别结果,设计的模板匹配电路具有较小的硬件复杂度和较快的处理速度。实验结果表明,本文所提出的识别系统在680×480图像分辨下,可达137.5帧/s的处理速度,实时性强,同时仅消耗了9个块随机存储器(Block Random Access Memory,BRAM)和2个数字信号处理器(Digital Signal Processor,DSP),硬件资源消耗较少,在处理小目标识别和分类问题上有较好的实用价值。

基于FPGA的图像处理硬件加速系统的设计

为解决图像处理算法越来越复杂,普通的计算平台已满足不了当前需求的问题,根据现场可编程门阵列(field programmable gate array, FPGA)的并行计算特点对FAST角点检测算法和Sobel边缘检测算法进行硬件加速,采用HLS(high-level synthesis, HLS)高层次综合技术对两种算法进行设计并进行相应的优化。为提升系统整体性能,在FPGA上实现全部视频输入输出接口和图像算法的完整通路,通过FPGA算法电路与OpenCV算法程序进行对比,前者的图像处理速度快于后者9~11倍,系统功耗也仅为1.9 W,图像检测可达56 fps,满足实时图像处理要求,为以后设计复杂的图像处理系统提供了参考。

基于FPGA的分段近似双边滤波算法设计与实现

为了增强图像显示的质量以及减少基于现场可编程逻辑器件(FPGA)双边滤波算法中硬件资源的消耗,设计了一种分段近似的双边滤波算法。通过分段近似计算减少了双边滤波中值域的存储容量以及输出的数据位宽,从而降低了计算复杂度和硬件资源消耗。在Zynq-7000和Sparten-7的FPGA平台上实现了分段近似的双边滤波算法,研究了不同高斯噪声及在其最佳的值域标准差下的滤波和边缘保持性能。结果表明,本文算法在性能上与传统的双边滤波算法相当,并且与传统的双边滤波算法相比,其查找表(LUT)和数字信号处理模块(DSP)的使用量减少了9.9%和71.1%,且功耗仅为0.128 W。本文算法适合用于硬件资源有限的图像滤波应用场景。

Heterogeneity induced strain localization in block-in-matrix-soils subjected to uniaxial loading using real-time CT scanning

Block-in-matrix-soils(bimsoils)are geological mixtures that have distinct structures consisting of relatively strong rock blocks and weak matrix soils.It is still a challenge to evaluate the mechanical behaviors of bimsoils because of the heterogeneity,chaotic structure,and lithological variability.As a result,only very limited laboratory studies have been reported on the evolution of their internal deformation.In this study,the deformation evolution of bimsoils under uniaxial loading is investigated using real-time X-ray computed tomography(CT)and image correlation algorithm(with a rock block percentage(RBP)of 40%).Three parameters,i.e.heterogeneity coefficient(K),correlation coefficient(CC),and standard deviation(STD)of displacement fields,are proposed to quantify the heterogeneity of the motion of the rock blocks and the progressive deformation of the bimsoils.Experimental results show that the rock blocks in bimsoils are prone to forming clusters with increasing loading,and the sliding surface goes around only one side of a cluster.Based on the movement of the rock blocks recorded by STD and CC,the progressive deformation of the bimsoils is quantitatively divided into three stages:initialization of the rotation of rock blocks,formation of rock block clusters,and formation of a shear band by rock blocks with significant rotation.Moreover,the experimental results demonstrate that the meso-motion of rock blocks controls the macroscopic mechanical properties of the samples.

基于FPGA的高分辨率红外目标检测技术研究

本次研究面向红外对空预警探测领域的实际问题,开展高分辨率红外图像目标检测算法设计与工程化应用验证。文中研究设计了基于中值滤波、卷积滤波核形态学滤波等的目标检测算法,并基于FPGA平台进行硬件移植验证与测试。实验表明本文采用的方法可以实现对高分辨率红外图像的目标检测功能,并且基于FPGA硬件提升算法的运算速度,使算法在FPGA硬件平台上完成实时运算传输的要求。

基于FPGA的视频实时边缘检测系统

为了解决经典Sobel算子边缘检测在捕获图像边缘信息时的细节不足,对传统基于软件平台的图像处理技术实时性差和速率低下的问题,提出一种基于经典Sobel算子的八方向自适应阈值Sobel算子边缘检测算法,并将其在FPGA芯片上运行。为了评估该算法的性能,采用OV7725摄像获取视频图像信息,然后通过灰度转换、高斯滤波和边缘检测算法进行二次处理。实验表明,改进后的Sobel算子边缘检测算法相较于经典Sobel算子,在边缘检测效果方面提升明显,能更精确捕捉图像边缘的细节信息,在FPGA上的运行速度能满足实时性的要求,为FPGA领域的实时图像处理提供了可行的解决方案。

基于FPGA的水下机器人视觉检测系统

为应对水下机器人视觉检测中面临的实时性、准确性和可靠性上的挑战,提出一种基于FPGA的水下机器人视觉检测系统。该系统将先进的图像处理技术与FPGA的并行处理能力相结合,实现高效实时的水下环境视觉检测。通过对硬件和软件的设计优化,确保系统在水下图像定位识别、电子防水、能源持续、照明、动力和通信等多方面发挥作用。实验验证显示该系统能够精确识别水下目标,对于提升水下机器人视觉检测技术的性能,推动其在实际应用中的广泛部署具有重要意义。

基于FPGA的手写数字识别系统设计

为了解决手写数字识别准确率不高的问题,设计了一种基于FPGA的手写数字识别系统。系统以Xilinx公司的Zynq-7020 FPGA为处理器,利用OV5640摄像头获取卷积神经网络训练完成的手写数字信息,并进行分析和处理,通过HDMI接口发送至液晶显示器进行显示。实验结果表明,该系统能够对卷积神经网络训练完成的不同形状的手写数字0~9进行准确的识别,手写数字识别准确率大于95%,为手写数字识别提供了一种参考。

改进边缘检测算法及其FPGA实现

针对传统边缘检测算法在FPGA上实现存在缺乏自适应性及实时性差的问题,结合FPGA高速并行处理数据的特点,提出一种改进的边缘检测算法。该算法首先将双边滤波应用于Canny边缘检测算法,在降低噪声的同时保留图像边缘梯度信息;其次使用改进的Sobel算子,在4个方向上进行梯度幅值计算,以提高图像边缘的定位精度;最后提出一种基于梯度直方图的一阶导数变化的自适应阈值选取策略,以提高算法的自适应能力。实验结果表明双边滤波处理后,图像的峰值信噪比(PSNR)相较传统Canny算法提升了109%。边缘图像的单边缘响应和边缘连接性有明显提升,同时满足实时性要求。为Canny算法应用到嵌入式机器视觉中提供一种可行方案。

基于 FPGA 的实时边缘检测控制系统研究

本文属于图像识别处理技术领域,提出一种基于FPGA的实时边缘检测控制系统。本文通过FPGA对摄像头进行寄存器配置,采集并得到原始图像,对采集的图像进行数字图像灰度处理,均值滤波、sobel边缘检测计算、二值化处理后并转化为RGB等操作,提取出目标图像的图像边缘轨迹,把图像边缘数据缓存到DDR里面,通过对FPGA内部DDR读写控制模块的处理,把DDR内部图像数据转成RGB格式,并通过HDMI显示器实时显示出目标图像边缘。本文采用改进型的sobel边缘提取算法,能够在边缘提取过程中细化边缘宽度,去除伪边缘,同时滤除多余的图像噪声,使输出的边缘图像更加符合实际的边缘信息。

基于FPGA的实时图像预处理系统研究

考虑到对图像去噪的实时性要求和对图像边缘保护要求越来越高,充分利用FPGA的并行数据处理能力强和逻辑资源丰富等特点,设计了一套基于FPGA的实时图像预处理系统,从而弥补PC处理速度慢的缺点。针对图像采集过程中出现的各种随机噪声,在硬件开发平台上基于FPGA设计了双边滤波算法、Sobel边缘检测算法、膨胀算法与腐蚀算法,并将处理后的图像显示在TFTLCD显示屏上。仿真及实验显示,处理640×480分辨率图像在PC上耗时1.52 s,使用本文方案耗时14.3 ms,表明该方案既可以降噪平衡,又保证了边缘效果,预处理速度达到了30帧/s。