This paper analyzes the current difficulties encountered in on-line inspection systems of strip surface quality, specifically relating to problems with real-time processing of huge amounts of data. To address this nee...This paper analyzes the current difficulties encountered in on-line inspection systems of strip surface quality, specifically relating to problems with real-time processing of huge amounts of data. To address this need, this paper describes an FPGA-based high-speed image processing module with both hardware and software aspects. Improving these two aspects together will help the system achieve real-time processing of massive image data, and simplifies the architecture of the strip surface quality on-line inspection system.展开更多
The increasing use of images in miscellaneous applications such as medical image analysis and visual quality inspection has led to growing interest in image processing.However,images are often contaminated with noise ...The increasing use of images in miscellaneous applications such as medical image analysis and visual quality inspection has led to growing interest in image processing.However,images are often contaminated with noise which may corrupt any of the following image processing steps.Therefore,noise filtering is often a necessary preprocessing step for the most image processing applications.Thus,in this paper an optimized field-programmable gate array(FPGA)design is proposed to implement the adaptive vector directional distance filter(AVDDF)in hardware/software(HW/SW)codesign context for removing noise from the images in real-time.For that,the high-level synthesis(HLS)flow is used through the Xilinx Vivado HLS tool to reduce the design complexity of the HW part.The SW part is developed based on C/C++programming language and executed on an advanced reduced instruction set computer(RISC)machines(ARM)Cortex-A53 processor.The communication between the SW and HW parts is achieved using the advanced extensible Interface stream(AXI-stream)interface to increase the data bandwidth.The experiment results on the Xilinx ZCU102 FPGA board show an improvement in processing time of the AVDDF filter by 98%for the HW/SW implementation relative to the SW implementation.This result is given for the same quality of image between the HW/SW and SW implementations in terms of the normalized color difference(NCD)and the peak signal to noise ratio(PSNR).展开更多
This is a paper about laser gyro sign a l processing circuit which is designed based on field-programmable gate array(FPGA) and digital signal processor(DSP).Through a pre-amplifier circuit,FPGA and DSP,a weak current...This is a paper about laser gyro sign a l processing circuit which is designed based on field-programmable gate array(FPGA) and digital signal processor(DSP).Through a pre-amplifier circuit,FPGA and DSP,a weak current signal is converted and transferred,then sent to the computer to display the final results.Through the laser gyro performance te sting,the obtained results coincide with those of the existing methods.Thus th e d esigned circuit realizes the function of laser gyro signal processing.展开更多
文摘为了提高小目标识别和分类的实时性,同时降低识别系统的资源消耗,本文提出了一种简易、高效的现场可编程门阵列(Field Programmable Gate Array,FPGA)小目标识别分类系统。该系统首先通过图像预处理消除图像噪点,并采用并行计算提升系统实时性。然后将处理后的图像与模板进行匹配计算得到识别结果,设计的模板匹配电路具有较小的硬件复杂度和较快的处理速度。实验结果表明,本文所提出的识别系统在680×480图像分辨下,可达137.5帧/s的处理速度,实时性强,同时仅消耗了9个块随机存储器(Block Random Access Memory,BRAM)和2个数字信号处理器(Digital Signal Processor,DSP),硬件资源消耗较少,在处理小目标识别和分类问题上有较好的实用价值。
文摘This paper analyzes the current difficulties encountered in on-line inspection systems of strip surface quality, specifically relating to problems with real-time processing of huge amounts of data. To address this need, this paper describes an FPGA-based high-speed image processing module with both hardware and software aspects. Improving these two aspects together will help the system achieve real-time processing of massive image data, and simplifies the architecture of the strip surface quality on-line inspection system.
基金funded by the Deanship of Scientific Research at Jouf University(Kingdom of Saudi Arabia)under Grant No.DSR-2021-02-03106.
文摘The increasing use of images in miscellaneous applications such as medical image analysis and visual quality inspection has led to growing interest in image processing.However,images are often contaminated with noise which may corrupt any of the following image processing steps.Therefore,noise filtering is often a necessary preprocessing step for the most image processing applications.Thus,in this paper an optimized field-programmable gate array(FPGA)design is proposed to implement the adaptive vector directional distance filter(AVDDF)in hardware/software(HW/SW)codesign context for removing noise from the images in real-time.For that,the high-level synthesis(HLS)flow is used through the Xilinx Vivado HLS tool to reduce the design complexity of the HW part.The SW part is developed based on C/C++programming language and executed on an advanced reduced instruction set computer(RISC)machines(ARM)Cortex-A53 processor.The communication between the SW and HW parts is achieved using the advanced extensible Interface stream(AXI-stream)interface to increase the data bandwidth.The experiment results on the Xilinx ZCU102 FPGA board show an improvement in processing time of the AVDDF filter by 98%for the HW/SW implementation relative to the SW implementation.This result is given for the same quality of image between the HW/SW and SW implementations in terms of the normalized color difference(NCD)and the peak signal to noise ratio(PSNR).
文摘This is a paper about laser gyro sign a l processing circuit which is designed based on field-programmable gate array(FPGA) and digital signal processor(DSP).Through a pre-amplifier circuit,FPGA and DSP,a weak current signal is converted and transferred,then sent to the computer to display the final results.Through the laser gyro performance te sting,the obtained results coincide with those of the existing methods.Thus th e d esigned circuit realizes the function of laser gyro signal processing.
