Four optimal design approaches of high-order finite-impulse response filters based on neural network

Four optimal approaches of high-order finite-impulse response(FIR) digital filters were developed for designing four types filters using neural network algorithms. The solutions were presented as parallel algorithms to approximate the desired frequency response specification. Therefore, these methods avoid matrix inversion, and make a fast calculation of the filter’s coefficients possible. The convergence theorems of these proposed algorithms were presented and proved to illustrate them stable, and the implementation of these methods was described together with some design guidelines. The simulation results show that the ripples of the designed FIR filters are significantly little in the pass-band and stop-band, and the proposed algorithms are of fast convergence.

Design of complex FIR filters with arbitrary magnitude and group delay responses

To design approximately linear-phase complex coefficient finite impulse response （FIR） digital filters with arbitrary magnitude and group delay responses, a novel neural network approach is studied. The approach is based on a batch back-propagation neural network algorithm by directly minimizing the real magnitude error and phase error from the linear-phase to obtain the filter＇s coefficients. The approach can deal with both the real and complex coefficient FIR digital filters design problems. The main advantage of the proposed design method is the significant reduction in the group delay error. The effectiveness of the proposed method is illustrated with two optimal design examples.

基于FIR-MSMA的配电网测频算法

针对配电网中含有谐波、带外干扰及其他严重干扰的同步相量测量问题,提出一种基于有限冲击响应滤波器和M类同步相量测量算法(finite impulse response-M synchrophasor measurement algorithm, FIR-MSMA)相结合的配电网测频算法。该方法利用最小二乘法设计出FIR-1滤波器提取低频信号,在此基础上利用设计的FIR-2滤波器实现频率测量的目的,并分析2种滤波器参数设定的原则。利用Matlab软件编制算法仿真程序,验证所提算法的动态测量性能。结果表明,相比于基于离散傅里叶变换的算法和基于滑动平均滤波器的算法,基于FIR-MSMA的算法具有更强的抗干扰能力和更高的测量精度。

基于一种新的三模集的低通FIR数字滤波器设计

本文对低通有限脉冲响应(FIR)数字滤波器的设计进行了研究;在对常用三模集和传统的具有脉冲响应系数的FIR数字滤波器分析的基础上,提出将一种新的三模集应用于低通FIR数字滤波器设计的新方法。该FIR滤波器由多个乘法-累加器单元构成,实现正向转换器、并行算术通道和逆向转换器的功能。正向转换器将一个二进制数编码成一个关于模集的余数表示的数,每个算术通道对模集的每个模进行模乘和累加,逆向转换器将一个余数表示的数解码为其等效的二进制数,算术通道以完全并行的架构工作,从而实现轻量化的计算和简单的结构;最后的仿真实验结果不仅验证了本文提出的设计方法的有效性,而且相比于传统的单向转换设计,本文提出的设计方法有更小的滤波器系数偏差和更好的频率响应等波纹特性。

海洋重力数据处理中的正反FIR滤波算法

数字滤波器是影响海洋重力数据处理成果质量的关键技术之一。该文提出了一种实时正反有限冲击响应(FIR)滤波算法,推导了具有线性相位正反FIR滤波器表达式并设计了实时滤波方案:该算法设计出的滤波器在所有的采样频谱内都满足严格意义上的线性相频特性;基于该算法设计的低通滤波器的阻带衰减大,有利于抑制海洋重力数据中的高频噪声。船载重力试验结果表明,在海洋重力数据处理中上述正反FIR滤波器的滤波器实时性好,滤波效果与事后正反FIR滤波器相当,优于单正向FIR滤波效果。

基于时间模式信号处理的三阶FIR滤波器实现

文中提出了一种基于时间模式信号处理电路的三阶低通有限脉冲响应(FIR)滤波器的实现。滤波器拓扑由一组新颖的构建块组成,这些构建块在时间模式下执行必要的功能,包括z-1运算、时间加法和时间乘法。设计的时域三阶FIR滤波器的输出与采样频率同步,且该滤波器的拓扑结构是模块化的,因此只需增加延迟和乘法器的数量就可以创建高阶滤波器。滤波器是在28 nm三星全耗尽绝缘体上硅FD-SOI工艺中设计的,电源电压为1 V,采样频率为5 MHz,仿真结果验证了理论分析的正确性,FIR滤波器在50 kHz的输入频率下实现了38.6 dB的信噪加失真比(SNDR),功耗约为200μW。

FPGA-Based Efficient Programmable Polyphase FIR Filter

The modelling, design and implementation of a high-speed programmable polyphase finite impulse response (FIR) filter with field programmable gate array (FPGA) technology are described. This FIR filter can run automatically according to the programmable configuration word including symmetry/asymmetry, odd/even taps, from 32 taps up to 256 taps. The filter with 12 bit signal and 12 bit coefficient word-length has been realized on a Xilinx VirtexⅡ-v1500 device and operates at the maximum sampling frequency of (160 MHz.)

A Fusion Kalman Filter and UFIR Estimator Using the Influence Function Method

In this paper,the Kalman filter(KF)and the unbiased finite impulse response(UFIR)filter are fused in the discrete-time state-space to improve robustness against uncertainties.To avoid the problem where fusion filters may give up some advantages of UFIR filters by fusing based on noise statistics,we attempt to find a way to fuse without using noise statistics.The fusion filtering algorithm is derived using the influence function that provides a quantified measure for disturbances on the resulting filtering outputs and is termed as an influence finite impulse response(IFIR)filter.The main advantage of the proposed method is that the noise statistics of process noise and measurement noise are no longer required in the fusion process,showing that a critical feature of the UFIR filter is inherited.One numerical example and a practice-oriented case are given to illustrate the effectiveness of the proposed method.It is shown that the IFIR filter has adaptive performance and can automatically switch from the Kalman estimate to the UFIR estimates according to operating conditions.Moreover,the proposed method can reduce the effects of optimal horizon length on the UFIR estimate and can give the state estimates of best accuracy among all the compared methods.

Design of Computationally Efficient Sharp FIR Filter Utilizing Modified Multistage FRM Technique for Wireless Communications Systems

Modern wireless communications gadgets demand multi-standard communications facilities with least overlap between different input radio channels. A sharp digital filter of extremely narrow transition-width with lower stop band ripples offers alias-free switching among the preferred frequency bands. A computationally competent low pass filter (LPF) structure based on the multistage frequency response masking (FRM) approach is proposed for the design of sharp finite impulse response (FIR) filters which are suitable for wireless communications applications. In comparison of basic FRM with other existing multistage FRM structures, the proposed structure has a narrow transition bandwidth and higher stop band attenuation with significant reduction in terms of the number of computational steps. A design example is incorporated to demonstrate the efficiency of the proposed approach. Simulation results establish the improvement of the proposed scheme over other recently published design strategies.

AN ITERATIVE ALGORITHM FOR OPTIMAL DESIGN OF NON-FREQUENCY-SELECTIVE FIR DIGITAL FILTERS

This paper proposes a novel iterative algorithm for optimal design of non-frequency-selective Finite Impulse Response(FIR) digital filters based on the windowing method.Different from the traditional optimization concept of adjusting the window or the filter order in the windowing design of an FIR digital filter,the key idea of the algorithm is minimizing the approximation error by succes-sively modifying the design result through an iterative procedure under the condition of a fixed window length.In the iterative procedure,the known deviation of the designed frequency response in each iteration from the ideal frequency response is used as a reference for the next iteration.Because the approximation error can be specified variably,the algorithm is applicable for the design of FIR digital filters with different technical requirements in the frequency domain.A design example is employed to illustrate the efficiency of the algorithm.

Continuously Variable Bandwidth Sharp FIR Filters with Low Complexity

In software defined radio (SDR), sharp filters of different bandwidth are required to fine tune the desired channel. This requires different computational resources and large number of filter coefficients. This paper proposes a continuously variable bandwidth sharp finite impulse response (FIR) filter with low distortion and low complexity. For this, a fixed length FIR filter is used with two arbitrary sampling rate converters. This system can be used for both the continuous increase as well as decrease of the effective bandwidth of a filter. The low complexity and sharpness are achieved by using the frequency-response masking (FRM) approach for the design of the fixed length FIR filter. The sharp transition width leads to maximum rejection to channel interference in SDR.

Area and Speed Efficient Implementation of Symmetric FIR Digital Filter through Reduced Parallel LUT Decomposed DA Approach

This brief proposes an area and speed efficient implementation of symmetric finite impulse response (FIR) digital filter using reduced parallel look-up table (LUT) distributed arithmetic (DA) based approach. The complexity lying in the realization of FIR filter is dominated by the multiplier structure. This complexity grows further with filter order, which results in increased area, power, and reduced speed of operation. The speed of operation is improved over multiply-accumulate approach using multiplier less conventional DA based design and decomposed DA based design. Both the structure requires B clock cycles to get the filter output for the input width of B, which limits the speed of DA structure. This limitation is addressed using parallel LUTs, called high speed DA FIR, at the expense of additional hardware cost. With large number of taps, the number of LUTs and its size also becomes large. In the proposed method, by exploiting coefficient symmetry property, the number of LUTs in the decomposed DA form is reduced by a factor of about 2. This proposed approach is applied in high speed DA based FIR design, to obtain area and speed efficient structure. The proposed design offers around 40% less area and 53.98% less slice-delay product (SDP) than the high throughput DA based structure when it’s implemented over Xilinx Virtex-5 FPGA device-XC5VSX95T-1FF1136 for 16-tap symmetric FIR filter. The proposed design on the same FPGA device, supports up to 607 MHz input sampling frequency, and offers 60.5% more speed and 67.71% less SDP than the systolic DA based design.

Digital FIR filter design for bio-signal processing system

Recently,real-time processing systems for bio-signal of the muscles generated by the movement of the user have been developed.Finite impulse response(FIR)filter for bio-signal processing in bio-signal process systems is composed of multiple multiplier and adder of high-area.This makes the chip area increase significantly.To solve this problem,a low-area digital FIR filter is proposed in this paper,which can reduce the chip area.

High-Performance FIR Filter Implementation Using Anurupye Vedic Multiplier

In this, today’s world immeasurable analysis goes within the field of communication and signal processing applications. The FIR filter is mostly employed in filtering applications to enhance the quality of the signal. In any processor, the performance of the system is based on the speed of the multiplier unit involved in its operation. Since multiplier forms the indispensable building blocks of the FIR filter system. Its performance has contributed in determining the execution of the FIR filter system. Also, due to the tremendous development in the technology, many approaches such as an array, Vedic methods are made to speed up the multiplier computations. The problem in speed-up operation and resource utilization of hardware with all the conventional methods due to the critical path found in partial products has to be optimized using proposed method. This paper presents the implementation and execution of a FIR Filter design using Anurupye multiplier. Here the FIR filter is examined by using various multiplier algorithms such as Anurupye, Urdhava Tiryagbhyam, and array multipliers. The FIR filter is simulated for analyzing delay;area and power are meted out and lessened by utilizing proposed Anurupye multiplier. The FIR filter design utilizing proposed multiplier offers delay around 18.99 and only 4% of LUT slice utilization compared to existing methods. This architecture is coded in VHDL, simulated using the ModelSim and synthesized with Xilinx.

航空重力数据窗函数法FIR低通数字滤波试验

采用窗函数法FIR低通数字滤波方法,对GT-1A型航空重力系统的测量数据进行了滤波试验研究,获得了一些有意义的结果。试验结果表明,通过选择合适窗形、窗口长度和滤波参数,窗函数法FIR低通数字滤波器是可以在航空重力数据的低通数字滤波处理中发挥应有的作用,获得满意的效果。

基于广义FIR滤波器的电力设备有源噪声控制

针对电力系统设备噪声问题,探讨有源噪声控制的设计方法 ,提出基于广义有限脉冲响应(finite impulse response,FIR)滤波器优化的有源噪声前馈控制算法,同时给出了信号检测传感器的布放方案,并通过误差传感器评价噪声控制的效果。采集了2组电力设备的噪声作为初级声源,并进行有源降噪的仿真,仿真结果显示,频率为50、100和200 Hz的低频噪声成分被降低了12～18 dB,可见,利用有源噪声控制技术实现电力系统设备低频噪声的控制是一种有效的途径。

胚胎型在线自修复FIR滤波器研究

胚胎电子阵列是受多细胞生物体自修复机制启发,具有在线自修复能力的新型电路。在介绍胚胎电子阵列基本原理的基础上,根据FIR(finite impulse response)滤波器的结构特征,提出一种适用于FIR滤波器的胚胎电子阵列细胞结构,并基于该细胞结构设计了具有快速在线自修复能力的胚胎型FIR滤波器。最后通过实例验证了其滤波功能与在线自修复能力。

支持任意系数长度和数据类型的FIR滤波器向量化方法

向量处理器的向量化算法映射是难点问题.提出一种支持任意系数长度和数据类型的FIR滤波器向量化方法,将(Finite Impulse Response)滤波器的卷积计算划分为系数长度步向量乘法和加法计算,每一步的向量乘法和加法计算在各个向量处理单元上并行执行,计算一个输出结果的所有乘法和加法计算都在同一向量处理单元上完成,每次循环能够同时完成向量处理单元数量个输出结果的计算.在向量处理器YHFT-Matrix的实验结果表明,该向量化FIR滤波器能够取得高效的计算性能和加速比.

高速并行FIR滤波器的FPGA实现

提出了一种基于多相滤波器的并行有限脉冲响应(finite impulse response,FIR)滤波器结构,可以有效提高滤波器运算的吞吐率,与传统的串行滤波器结构比,并行滤波器运算速度可以提高L倍,其中L为并行的路数,并且运算延迟小。首先从理论上分析了基于多相滤波器的并行滤波原理,并以八路并行为例,对FIR滤波运算做了浮点仿真验证。然后用经典符号数表示以及优化定点滤波器系数,并针对滤波器系数设计了流水线结构。最后在Altera的Stratix II系列芯片上实现了定点并行滤波器。可编程逻辑阵列(field programmable gatearray,FPGA)编译以及下载测试结果表明,该滤波器仅占用少量的资源,其等效吞吐率可以达到2 GHz。

航空重力数据的等波纹FIR低通滤波试验

为解决航空重力测量中的核心技术之一——强噪声背景下提取微弱重力异常信号的问题,根据等波纹切比雪夫逼近理论,采用瑞米兹(Remez)交换算法设计等波纹线性相位FIR低通滤波器,利用模型数据对该方法进行了验证,并通过GT-1A型航空重力系统测量数据进行滤波试验。结果表明,基于Remez交换算法设计等波纹线性相位FIR低通滤波器,在自由空气重力异常获取的滤波试验中,能获得与GT-1A系统卡尔曼平滑滤波相同的效果。