We investigate the thermal stresses for GaAs layers grown on V-groove patterned Si substrates by the finite-element method. The results show that the thermal stress distribution near the interface in a patterned subst...We investigate the thermal stresses for GaAs layers grown on V-groove patterned Si substrates by the finite-element method. The results show that the thermal stress distribution near the interface in a patterned substrate is nonuniform,which is far different from that in a planar substrate. Comparing with the planar substrate, the thermal stress is significantly reduced for the Ga As layer on the patterned substrate. The effects of the width of the V-groove, the thickness, and the width of the SiO_(2) mask on the thermal stress are studied. It is found that the SiO_(2) mask and V-groove play a crucial role in the stress of the Ga As layer on Si substrate. The results indicate that when the width of V-groove is 50 nm, the width and the thickness of the SiO_(2) mask are both 100 nm, the Ga As layer is subjected to the minimum stress. Furthermore,Comparing with the planar substrate, the average stress of the Ga As epitaxial layer in the growth window region of the patterned substrate is reduced by 90%. These findings are useful in the optimal designing of growing high-quality Ga As films on patterned Si substrates.展开更多
The first operation of an electrically pumped 1.3μm InAs/GaAs quantum-dot laser was previously reported epitaxially grown on Si (100) substrate. Here the direct epitaxial growth condition of 1.3μm InAs/OaAs quantu...The first operation of an electrically pumped 1.3μm InAs/GaAs quantum-dot laser was previously reported epitaxially grown on Si (100) substrate. Here the direct epitaxial growth condition of 1.3μm InAs/OaAs quantum on a Si substrate is further investigated using atomic force microscopy, etch pit density and temperature-dependent photoluminescence (PL) measurements. The PL for Si-based InAs/GaAs quantum dots appears to be very sensitive to the initial OaAs nucleation temperature and thickness with strongest room-temperature emission at 40000 (17Onto nucleation layer thickness), due to the lower density of defects generated under this growth condition, and stronger carrier confinement within the quantum dots.展开更多
A high quality of GaAs crystal growth in nanoscale V-shape trenches on Si(O01) substrates is achieved by using the aspect-ratio trapping method. GaAs thin films are deposited via metal-organic chemical vapor deposit...A high quality of GaAs crystal growth in nanoscale V-shape trenches on Si(O01) substrates is achieved by using the aspect-ratio trapping method. GaAs thin films are deposited via metal-organic chemical vapor deposition by using a two-step growth process. Threading disJocations arising from lattice mismatch are trapped by laterally confining sidewalls, and antiphase domains boundaries are completely restricted by V-groove trenches with Si { 111} facets. Material quality is confirmed by scanning electron microscopy (SEM), transmission electron microscopy (TEM) and high resolution X-ray diffraction. Low temperature photoluminescence (PL) measurement is used to analyze the thermal strain relaxation in GaAs layers. This approach shows great promise for the realization of high mobility devices or optoelectronie integrated circuits on Si substrates.展开更多
基金Project supported by the National Natural Science Foundation of China(Grant Nos.61874148,61974141,and 61674020)the Beijing Natural Science Foundation,China(Grant No.4192043)+1 种基金the State Key Laboratory of Information Photonics and Optical Communications(Beijing University of Posts and Telecommunications),China(Grant No.IPOC2018ZT01)the 111 Project of China(Grant No.B07005)。
文摘We investigate the thermal stresses for GaAs layers grown on V-groove patterned Si substrates by the finite-element method. The results show that the thermal stress distribution near the interface in a patterned substrate is nonuniform,which is far different from that in a planar substrate. Comparing with the planar substrate, the thermal stress is significantly reduced for the Ga As layer on the patterned substrate. The effects of the width of the V-groove, the thickness, and the width of the SiO_(2) mask on the thermal stress are studied. It is found that the SiO_(2) mask and V-groove play a crucial role in the stress of the Ga As layer on Si substrate. The results indicate that when the width of V-groove is 50 nm, the width and the thickness of the SiO_(2) mask are both 100 nm, the Ga As layer is subjected to the minimum stress. Furthermore,Comparing with the planar substrate, the average stress of the Ga As epitaxial layer in the growth window region of the patterned substrate is reduced by 90%. These findings are useful in the optimal designing of growing high-quality Ga As films on patterned Si substrates.
基金Supported by the National Natural Science Foundation of China under Grant Nos 11434010,11574356 and 11504415the Funds from the Royal Society,the Defense Science Technology Laboratory and UK Engineering and Physics Research Council
文摘The first operation of an electrically pumped 1.3μm InAs/GaAs quantum-dot laser was previously reported epitaxially grown on Si (100) substrate. Here the direct epitaxial growth condition of 1.3μm InAs/OaAs quantum on a Si substrate is further investigated using atomic force microscopy, etch pit density and temperature-dependent photoluminescence (PL) measurements. The PL for Si-based InAs/GaAs quantum dots appears to be very sensitive to the initial OaAs nucleation temperature and thickness with strongest room-temperature emission at 40000 (17Onto nucleation layer thickness), due to the lower density of defects generated under this growth condition, and stronger carrier confinement within the quantum dots.
基金Supported by the National Science and Technology Major Project of China under Grant No 2011ZX02708
文摘A high quality of GaAs crystal growth in nanoscale V-shape trenches on Si(O01) substrates is achieved by using the aspect-ratio trapping method. GaAs thin films are deposited via metal-organic chemical vapor deposition by using a two-step growth process. Threading disJocations arising from lattice mismatch are trapped by laterally confining sidewalls, and antiphase domains boundaries are completely restricted by V-groove trenches with Si { 111} facets. Material quality is confirmed by scanning electron microscopy (SEM), transmission electron microscopy (TEM) and high resolution X-ray diffraction. Low temperature photoluminescence (PL) measurement is used to analyze the thermal strain relaxation in GaAs layers. This approach shows great promise for the realization of high mobility devices or optoelectronie integrated circuits on Si substrates.