This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to c...This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to control buck switch mode converter.The idea behind this strategy is to suppress chattering and maintain robustness and finite time convergence properties of the output voltage error to the equilibrium point under the load variations and parametric uncertainties.In addition,the influence of the twisting algorithm on the performance of closed-loop system is investigated and compared with other algorithms of first order sliding mode control such as adaptive sliding mode control(ASMC),nonsingular terminal sliding mode control(NTSMC).In comparative evaluation,the transient response of the output voltage with the step change in the load and the start-up response of the output voltage with the step change in the input voltage of buck converter were compared.Experimental results were obtained from a hardware setup constructed in laboratory.Finally,for all of the surveyed control methods,the theoretical considerations,numerical simulations,and experimental measurements from a laboratory prototype are compared for different operating points.It is shown that the proposed twisting method presents an improvement in steady state error and settling time of output voltage during load changes.展开更多
In this paper, a robust sliding mode controller for the control of dc-dc buck converter is designed and analyzed. Dynamic equations describing the buck converter are derived and sliding mode controller is designed. A ...In this paper, a robust sliding mode controller for the control of dc-dc buck converter is designed and analyzed. Dynamic equations describing the buck converter are derived and sliding mode controller is designed. A two-loop control is employed for a buck converter. The robustness of the sliding mode controlled buck converter system is tested for step load changes and input voltage variations. The theoretical predictions are validated by means of simulations. Matlab/Simulink is used for the simulations. The simulation results are presented. The buck converter is tested with operating point changes and parameter uncertainties. Fast dynamic response of the output voltage and robustness to load and input voltage variations are obtained.展开更多
The MPPT （maximum power point tracking） is one of the most important features of a regulator system that processes the energy produced by a photovoltaic generator. It is necessary, in fact, to design a controller th...The MPPT （maximum power point tracking） is one of the most important features of a regulator system that processes the energy produced by a photovoltaic generator. It is necessary, in fact, to design a controller that is able to set the output value of the voltage and ensure the working within the maximum power point. In this paper, we propose the application of the robust sliding mode control technique to a DC-DC buck converter which is combined with a classical P ＆ O （perturbation and observation） algorithm to enhance the solar system efficiency. Dynamic equations describing the boost converter are derived and a sliding mode controller for a buck converter is designed. It is shown that, this control approach gives good results in terms of robustness toward load and input voltage variations. The effectiveness of the proposed work is verified by the simulation results under PowerSim environment.展开更多
A novel high step-down non-isolated DC-DC converter has been proposed. The proposed converter consists of highly efficient non-isolated cell converters using bidirectional semiconductor power devices, and these cell c...A novel high step-down non-isolated DC-DC converter has been proposed. The proposed converter consists of highly efficient non-isolated cell converters using bidirectional semiconductor power devices, and these cell converters are connected in ISOP （input series and output parallel）. The non-isolated ISOP converter achieves high step-down ratio of D/N, operating N cell converters under the duty ratio olD. Availability of the proposed converter has been shown by developing the 48 V-12 V laboratory prototype using two 24 V-12 V cell converters. Design consideration for the 48 V-3 V multicellular converter using four 12 V-3 V cell converters has been also conducted, and the potential to approach the efficiency of 97% has been discussed. The proposed topology is suitable for the POL （point of load） converters in the highly efficient next generation DC distribution system for data centers.展开更多
Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode（DCM） c...Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode（DCM） controller and gate width controller,is proposed to improve efficiency.Instead of PWM modulation, sigma-delta modulation is introduced into the feedback loop of the converter to move out the clock-referred harmonic spike.The proposed converter has been designed and fabricated by a 0.35μm CMOS process.Measured results show that the peak efficiency of the converter can reach 93%and sigma-delta modulation suppresses the harmonic spike by 30 dB over PWM modulation.展开更多
This paper presents a width controller,a dead time controller,a discontinuous current mode（DCM） controller and a frequency skipping modulation（FSM） controller for a high frequency high efficiency buck DC-DC conver...This paper presents a width controller,a dead time controller,a discontinuous current mode（DCM） controller and a frequency skipping modulation（FSM） controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range,especially at high switching frequency,the dead time controller and width controller are applied to enhance the high load efficiency,while the DCM controller and FSM controller are proposed to increase the light load efficiency.The proposed DC-DC converter controllers have been designed and fabricated in the Chartered 0.35μm CMOS process,and the measured results show that the efficiency of the buck DC-DC converter is above 80%over a wide load current range from 8 to 570 mA,and the peak efficiency is 86%at 10 MHz switching frequency.展开更多
A high switching frequency voltage-mode buck converter with fast voltage-tracking speed and wide output voltage range has been proposed. A novel error amplifier （EA） is presented to achieve a high DC gain and get hi...A high switching frequency voltage-mode buck converter with fast voltage-tracking speed and wide output voltage range has been proposed. A novel error amplifier （EA） is presented to achieve a high DC gain and get high phase margin, including a resistor and capacitor net, a unit gain block and a high gain block. The investigated converter has been fabricated with GF 0.35 μm CMOS process and can operate at 6 MHz with the output voltage range from 0.6 to 3.4 V. The experimental results show that the voltage-tracking speed can achieve 8.8 μs/V for up-tracking and 6 μs/V for down-tracking. Besides, the recovery time is less than 8 μs while the load current suddenly changes 400 mA.展开更多
A 50 MHz 1.8/0.9 V dual-mode buck DC-DC converter is proposed in this paper. A dual-mode control for high-frequency DC-DC converter is presented to enhance the conversion efficiency of light-load in this paper. A nove...A 50 MHz 1.8/0.9 V dual-mode buck DC-DC converter is proposed in this paper. A dual-mode control for high-frequency DC-DC converter is presented to enhance the conversion efficiency of light-load in this paper. A novel zero-crossing detector is proposed to shut down synchronous rectification transistor NMOS when the inductor crosses zero, which can decrease the power loss caused by reverse current and the trip point is adjusted by regulating IBIAS （BIAS current）. A new logic control for pulse-skipping modulation loop is also presented in this paper, which has advantages of simple structure and low power loss. The proposed converter is realized in SMIC 0.18μm 1-poly 6-metal mixed signal CMOS process. With switching loss, conduction loss and reverse current related loss optimized, an efficiency of 57% is maintained at 10 mA, and a peak efficiency of 71% is measured at nominal operating conditions with a voltage conversion of 1.8 to 0.9 V.展开更多
文摘This paper presents a simple and systematic approach to design second order sliding mode controller for buck converters.The second order sliding mode control(SOSMC)based on twisting algorithm has been implemented to control buck switch mode converter.The idea behind this strategy is to suppress chattering and maintain robustness and finite time convergence properties of the output voltage error to the equilibrium point under the load variations and parametric uncertainties.In addition,the influence of the twisting algorithm on the performance of closed-loop system is investigated and compared with other algorithms of first order sliding mode control such as adaptive sliding mode control(ASMC),nonsingular terminal sliding mode control(NTSMC).In comparative evaluation,the transient response of the output voltage with the step change in the load and the start-up response of the output voltage with the step change in the input voltage of buck converter were compared.Experimental results were obtained from a hardware setup constructed in laboratory.Finally,for all of the surveyed control methods,the theoretical considerations,numerical simulations,and experimental measurements from a laboratory prototype are compared for different operating points.It is shown that the proposed twisting method presents an improvement in steady state error and settling time of output voltage during load changes.
文摘In this paper, a robust sliding mode controller for the control of dc-dc buck converter is designed and analyzed. Dynamic equations describing the buck converter are derived and sliding mode controller is designed. A two-loop control is employed for a buck converter. The robustness of the sliding mode controlled buck converter system is tested for step load changes and input voltage variations. The theoretical predictions are validated by means of simulations. Matlab/Simulink is used for the simulations. The simulation results are presented. The buck converter is tested with operating point changes and parameter uncertainties. Fast dynamic response of the output voltage and robustness to load and input voltage variations are obtained.
文摘The MPPT （maximum power point tracking） is one of the most important features of a regulator system that processes the energy produced by a photovoltaic generator. It is necessary, in fact, to design a controller that is able to set the output value of the voltage and ensure the working within the maximum power point. In this paper, we propose the application of the robust sliding mode control technique to a DC-DC buck converter which is combined with a classical P ＆ O （perturbation and observation） algorithm to enhance the solar system efficiency. Dynamic equations describing the boost converter are derived and a sliding mode controller for a buck converter is designed. It is shown that, this control approach gives good results in terms of robustness toward load and input voltage variations. The effectiveness of the proposed work is verified by the simulation results under PowerSim environment.
文摘A novel high step-down non-isolated DC-DC converter has been proposed. The proposed converter consists of highly efficient non-isolated cell converters using bidirectional semiconductor power devices, and these cell converters are connected in ISOP （input series and output parallel）. The non-isolated ISOP converter achieves high step-down ratio of D/N, operating N cell converters under the duty ratio olD. Availability of the proposed converter has been shown by developing the 48 V-12 V laboratory prototype using two 24 V-12 V cell converters. Design consideration for the 48 V-3 V multicellular converter using four 12 V-3 V cell converters has been also conducted, and the potential to approach the efficiency of 97% has been discussed. The proposed topology is suitable for the POL （point of load） converters in the highly efficient next generation DC distribution system for data centers.
基金Project supported by the National High Technology Research and Development Program of China(No.2009AA011607)
文摘Some research efforts to improve the efficiency and noise performance of buck DC-DC converters are explored.A carefully designed power MOSFET driver,including a dead time controller,discontinuous current mode（DCM） controller and gate width controller,is proposed to improve efficiency.Instead of PWM modulation, sigma-delta modulation is introduced into the feedback loop of the converter to move out the clock-referred harmonic spike.The proposed converter has been designed and fabricated by a 0.35μm CMOS process.Measured results show that the peak efficiency of the converter can reach 93%and sigma-delta modulation suppresses the harmonic spike by 30 dB over PWM modulation.
基金Project supported by the National Natural Science Foundation of China(No.60676013).
文摘This paper presents a width controller,a dead time controller,a discontinuous current mode（DCM） controller and a frequency skipping modulation（FSM） controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range,especially at high switching frequency,the dead time controller and width controller are applied to enhance the high load efficiency,while the DCM controller and FSM controller are proposed to increase the light load efficiency.The proposed DC-DC converter controllers have been designed and fabricated in the Chartered 0.35μm CMOS process,and the measured results show that the efficiency of the buck DC-DC converter is above 80%over a wide load current range from 8 to 570 mA,and the peak efficiency is 86%at 10 MHz switching frequency.
文摘A high switching frequency voltage-mode buck converter with fast voltage-tracking speed and wide output voltage range has been proposed. A novel error amplifier （EA） is presented to achieve a high DC gain and get high phase margin, including a resistor and capacitor net, a unit gain block and a high gain block. The investigated converter has been fabricated with GF 0.35 μm CMOS process and can operate at 6 MHz with the output voltage range from 0.6 to 3.4 V. The experimental results show that the voltage-tracking speed can achieve 8.8 μs/V for up-tracking and 6 μs/V for down-tracking. Besides, the recovery time is less than 8 μs while the load current suddenly changes 400 mA.
基金supported by the National Natural Science Foundation of China(Nos.61404043,61401137)the Key Laboratory of Infrared Imaging Material and Detectors,Shanghai Institute of Technical Physics,CAS(Nos.IIMDKFJJ-13-06,IIMDKFJJ-14-03)the Fundamental Research Funds for the Central University(No.2015HGZX0026)
文摘A 50 MHz 1.8/0.9 V dual-mode buck DC-DC converter is proposed in this paper. A dual-mode control for high-frequency DC-DC converter is presented to enhance the conversion efficiency of light-load in this paper. A novel zero-crossing detector is proposed to shut down synchronous rectification transistor NMOS when the inductor crosses zero, which can decrease the power loss caused by reverse current and the trip point is adjusted by regulating IBIAS （BIAS current）. A new logic control for pulse-skipping modulation loop is also presented in this paper, which has advantages of simple structure and low power loss. The proposed converter is realized in SMIC 0.18μm 1-poly 6-metal mixed signal CMOS process. With switching loss, conduction loss and reverse current related loss optimized, an efficiency of 57% is maintained at 10 mA, and a peak efficiency of 71% is measured at nominal operating conditions with a voltage conversion of 1.8 to 0.9 V.
